Commit Graph

5047 Commits

Author SHA1 Message Date
Uwe Hermann a953f371dd Debugging facility improvements.
- Hook up malloc() debug code via CONFIG_DEBUG_MALLOC. Only show it in
   menuconfig if at least DEBUG or SPEW are selected as loglevel, as this
   code does additional printk(BIOS_DEBUG, ...) calls which would otherwise
   not be visible anyway.

 - Similarly, make DEBUG_CAR and REALMODE_DEBUG only visible if thr DEBUG or
   SPEW loglevel is selected.

 - Get rid of a custom "debug" macro, use printk() as usual.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-10 00:14:32 +00:00
Uwe Hermann f228a6cf93 ITE IT8661F changes to match the common code structure.
- it8661f_enable_serial() is now in the usual format, using pnp_* functions.
 
 - Factor out pnp_enter_ext_func_mode()/pnp_exit_ext_func_mode().
 
 - Factor out it8661f_set_clkin() to set the CLKIN to 24/48MHz.
 
 - Factor out it8661f_enable_logical_devices(), might not be needed though.
   We leave it here until it's confirmed on hardware that it's not needed.

 - Move some #defines to it8661f.h.

 - Drop no longer used it8661f_sio_write().

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-10 00:08:42 +00:00
Tobias Diedrich c29246739a This fixes a FIXME in src/cpu/amd/mtrr/amd_mtrr.c and shuts up the
Linux kernel, which was previously complaining that the MTRR setup
is wrong, if the cpu supports more than CONFIG_CPU_ADDR_BITS bits of
address space.

Shamelessly copied from Linux arch/x86/kernel/cpu/mtrr/main.c

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Scott Duplichan <scott@notabs.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-09 22:31:11 +00:00
Tobias Diedrich 8b3cac2a6c Add acpi tables and dsdt.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-09 22:18:28 +00:00
Tobias Diedrich 6222fe0443 Add pirq table for ASUS M2V.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-09 22:11:00 +00:00
Uwe Hermann 7fa0819ecf Add #include guards to all Super I/O header files (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-08 20:55:24 +00:00
Ward Vandewege f648d619c9 We can't print this early.
This patch fixes a hang on

  supermicro/h8dme
  supermicro/h8dmr
  supermicro/h8dmr_fam10

and possibly on other mcp55-based boards.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-08 17:41:43 +00:00
Uwe Hermann 5c6bae213e Random ITE Super I/O fixes.
- Drop some of the less useful / outdated / duplicated comments.

 - Simplify and streamline some code to look like the other Super I/Os.

 - Use u8/16/etc. everywhere.

 - ITE IT8718F: Add missing GPIO LDN.
 
 - Add missing braces around SIO_DATA #defines, potential bug even.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-08 15:16:30 +00:00
Scott Duplichan 6018e1ba7f DSDT.asl should not report the AMD SB600/SB700 RTC as Intel PIIX4
compatible. The extended cmos is accessed differently for AMD
and Intel RTCs. Not sure what if any OS cares about this distinction,
but non-Intel compatible seems like a safer way to report the AMD RTC.
Tested with Win7 on Mahogany_fam10 and kino-780am2-fam10.

Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6046 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 20:11:39 +00:00
Tobias Diedrich 4e6305f4ab Should be part of 6044. I forgot to add the directory :/
This adds the m2v directory and necessary files to src/mainboards/asus and
adjusts the Kconfig.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6045 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 20:08:45 +00:00
Tobias Diedrich 4a6dfebf39 This adds the m2v directory and necessary files to src/mainboards/asus and
adjusts the Kconfig.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6044 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 19:27:45 +00:00
Tobias Diedrich a151f27cb0 Depends on the "Introduce get_vt8237_lpc() function" and
"Use get_vt8237_lpc() in vt8237_sb_enable_fid_vid()" patches.

This adds VT8237A specific VLINK/LPC init in vt8237r_early_smbus.c
I ran some tests and apparently both the

|			/* So the chip knows we are on AMD. */
|			pci_write_config8(devctl, 0x7c, 0x7f);

and

|	/*
|	 * Allow SLP# signal to assert LDTSTOP_L.
|	 * Will work for C3 and for FID/VID change.
|	 */
|	outb(0x1, VT8237R_ACPI_IO_BASE + 0x11);

in vt8237r_early_smbus.c are needed on VT8237A, otherwise I get a (non-fatal)
fid/vid change error on boot.

While vt8237a_vlink_init() in vt8237_ctrl.c is a modified vt8237r_vlink_init(),
vt8237a_init() in vt8237r_lpc.c is a modified vt8237s_init().

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 19:17:18 +00:00
Tobias Diedrich 7714cd0515 This adds the VT8237A LPC pci_locate_device call in vt8237r_early_smbus.c
Depends on the "Introduce get_vt8237_lpc() function" patch.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 18:57:10 +00:00
Tobias Diedrich e165d41b08 Use get_vt8237_lpc() in vt8237_sb_enable_fid_vid() too.
I broke this out into a seperate part to keep the other half as
straight-forward as possible.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6041 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 18:51:13 +00:00
Tobias Diedrich ef2928e708 Instead of duplicating the pci_locate_device calls multiple times,
add a get_vt8237_lpc() function.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>

Acked-by: Rudolf Marek <r.marek@assembler.cz>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6040 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 18:46:13 +00:00
Tobias Diedrich 6953eeb342 Add pointer to public PCIe bridge documentation on
http://linux.via.com.tw/ as VX800 seems to be compatible.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 18:37:39 +00:00
Tobias Diedrich 113b29f3c1 This adds VT8237A specific VLINK/LPC init functions in vt8237_ctrl.c
and vt8237r_lpc.c.

While vt8237a_vlink_init() in vt8237_ctrl.c is a modified vt8237r_vlink_init(),
vt8237a_init() in vt8237r_lpc.c is a modified vt8237s_init().

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 18:28:34 +00:00
Rudolf Marek b9e16dffd3 Remove empty files added by accident. Sorry about that.
Rudolf

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6037 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 18:25:11 +00:00
Patrick Georgi 7bbd7f2318 Move K8_ALLOCATE_IO_RANGE to Kconfig.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 18:20:51 +00:00
Tobias Diedrich 2210135468 This adds the VT8237A LPC device id and the pci_driver struct in
vt8237r_lpc.c

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 18:20:32 +00:00
Patrick Georgi 9fb2e3ab76 FIRST_CPU, SECOND_CPU, TOTAL_CPUS are only used in one
other place, and that defines these symbols itself (and
identical, too). Drop them.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6034 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 17:49:05 +00:00
Uwe Hermann 168acf9bb6 Fix a few incorrect GIGABYTE board names (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6033 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 17:47:01 +00:00
Uwe Hermann fbd85a13ae ECS P6IWP-Fe: Fix typo, add missing license header.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6032 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 16:49:31 +00:00
Patrick Georgi 68854f3cc9 Remove unused defines (UART_*)
All other uses of these symbols have their own (identical)
definitions.

abuild-tested and trivial

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-07 08:15:13 +00:00
Uwe Hermann 8c02368e2d Various Super I/O fixes and corrections.
- VIA VT1211:
   - Add missing LDNs and respective code to handle them.
   - Add some TODOs for other stuff that needs fixing.
   - Use VT1211_SP1 instead of hardcoding the LDN number (2).
   - Fixup pnp_dev_info[] as per datasheet, but some TODOs remain.
   - Various coding style fixes and changes to u8/u16/etc.
 
 - Serverengines Pilot: Various coding style fixes and changes to u8/u16/etc.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-06 23:36:49 +00:00
Uwe Hermann 9915944b18 Remove comments that are obsolete since r6028.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-06 00:57:19 +00:00
Patrick Georgi 00e1460a83 Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6028 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 22:59:49 +00:00
Uwe Hermann d51122df4e Various PIRQ/MPTABLE/ACPI Kconfig fixes.
- Use HAVE_ACPI_TABLES, HAVE_MP_TABLE, and HAVE_PIRQ_TABLE (instead of
   GENERATE_*) in the board's Kconfig file, as all other boards do.

 - Add missing HAVE_ACPI_TABLES/HAVE_MP_TABLE/HAVE_PIRQ_TABLE to boards
   which have the respective files. The only exception: EPIA-M700 doesn't
   select ACPI, as it doesn't have dsdt.asl. Added a comment that the user
   is supposed to run the 'get_dsdt' script and edit Kconfig afterwards.

 - Fix minor warning/error in
   src/mainboard/msi/ms9652_fam10/acpi_tables.c,
   now that the file is actually used.

 - msi/ms9652_fam10: use #include instead of Include() as we usually do
   now.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6027 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 16:17:46 +00:00
Uwe Hermann adc975098d Follow-up for r6025, do 0x87 twice in superio.c, too.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6026 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 12:44:25 +00:00
Zheng Bao 27770c93d4 According to the description in datasheet of f71889,
"To enable configuration, the entry key 0x87 must be written to
the index port"

"
 -o 4e 87
 -o 4e 87	(enable configuration)
 -o 4e aa	(disable configuration)
"
This piece of text appears in most of the datasheet of fintek superio.
It doesnt say it quite clear, but it seems that the 0x87 should
be written twice. I tried on f81865, which is not in the coreboot tree
yet. If the 0x87 is only written once, you can only R/W the index/data
port once. All the subsequent RW will fail. Writing twice will be ok.

Plus, in the superiotool, the function enter_conf_mode_winbond_fintek_ite_8787
also write 8787.

The fintek superio chips seem to enable the UART automatically when the
power is on. So I didnt find it failed to access.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6025 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 07:59:06 +00:00
Zheng Bao 0e40e6ba4d Add detection support for the Fintek F81865/F81865-I.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 00:34:12 +00:00
Nils Jacobs eca32808cb Add Kconfig CPU speed selection to Geode GX2 boards.
This is Abuild and boot tested.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 00:23:11 +00:00
Nils Jacobs f29b3b68c8 GX2: Define the unused DIMM1 to 0xFF to make it obvious it is a bogus value.
This is Abuild and boot tested.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 00:19:21 +00:00
Nils Jacobs a1e2c56079 Remove banner wrapper function and unify print(k) usage.
- Drop banner(), use printk()s instead.

 - Uncomment a few printk()s, if a users doesn't want to see them he/she
   can lower the debug level.

 - Replace print_emerg() with printk(BIOS_EMERG) etc.

Also change 'Assymetirc' into 'Asymmetric', thanks to Idwer for spotting.

This is Abuild and boot tested.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6021 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 00:13:14 +00:00
Uwe Hermann 7d3418849d Fintek and Intel i3100 Super I/O cleanups.
- Drop commented out "config chip.h" and a duplicate link to a datasheet.

 - F71805F -> F71805F/FG, to mention all variants.
 
 - Use u8/u16/ etc. everywhere.
 
 - Add a missing (C) line.
 
 - Fix up a bunch of pnp_dev_info[] structs according to the datasheets.
 
 - Fintek F71889: Drop res1/PNP_IO1 from KBC, there's no 0x62/0x63 register
   pair on this Super I/O.
   
 - Fintek F71863FG: This Super I/O _does_ have a keyboard/mouse LDN, add the
   respective code in superio.c. Also: Add missing LDNs to f71863fg.h.
   
 - i3100: Add some more comments and datasheet infos.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 00:07:13 +00:00
Uwe Hermann e4870474b9 Various cosmetic and coding style fixes in src/devices.
Also:

 - Improve a few code comments, fix typos, etc.

 - Change a few more variable types to u8/u16/u32 etc.

 - Make some very long lines fit into 80chars/line.

 - Drop a huge duplicated comment, use "@see" to refer to the other one.

 - Reduce nesting level a bit by restructuring some code chunks.

 - s/Config.lb/devicetree.cb/ in a few places.

Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-04 23:23:47 +00:00
Uwe Hermann 305e8861d6 Add a rom_enable() function to via/vt8231 and call it from via/epia/romstage.c
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6018 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-04 18:33:42 +00:00
Alec Ari 0ae7131f2e Add Fintek F71889 Super I/O support.
Untested, but should work mostly (even though some TODOs remain).

Signed-off-by: Alec Ari <neotheuser@ymail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-03 21:46:41 +00:00
Nils Jacobs a215b0f0be Remove some unused code from gx2/raminit.c.
This is Abuild and boot tested.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-03 13:24:29 +00:00
Nils Jacobs e98db798c9 Clean up some more comments and white space in model_gx2/cpureginit.c.
This is Abuild and boot tested.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6015 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-03 13:21:41 +00:00
Nils Jacobs 5beac7f996 Clean up some comments and white space in gx2/northbridgeinit.c
and gx2/raminit.c.

This is Abuild and boot tested.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-03 13:19:50 +00:00
Tobias Diedrich b54585244b Need to clear downstream read cycle retry bit, or the bus scan will
hang.  Also need to set lane config to 0x00 for autonegotiation.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-02 21:24:29 +00:00
Tobias Diedrich d50b43a128 This adds pci device ids and pci_driver structs for the K8T890 CF
variant. It also adds additional dev_find_device calls in k8t890_ctrl.c for
subfunctions 3 and 7.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-02 20:54:37 +00:00
Nils Jacobs 76890dde14 Change Geode GX2 to use the auto DRAM detect code from Geode LX.
Also, change the GX2 boards to use it.

Add a processor speed setting function in human readable MHz and remove
the useless and broken PLLMSR settings (the processor speed was hardcoded
to 366MHz in pll_reset.c).

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-01 15:20:27 +00:00
Nils Jacobs 9644623934 Remove some unused code.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-01 14:39:49 +00:00
Nils Jacobs 809e29ec8f GX2: Clean up some white space and comments.
Also, add a copyright header to pll_reset.c.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-01 14:36:54 +00:00
Nils Jacobs fc9fcf7414 GX2: Change MSR register numbers into more descriptive names.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-01 14:18:11 +00:00
Uwe Hermann e5b60bcf04 Remove definitions of ACPI_SSDTX_NUM to 0, that's the default anyway.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-31 23:24:18 +00:00
Uwe Hermann f9892166d5 Remove incorrect IOAPIC lines from some mptable.c files.
- via/epia-n/mptable.c
 - intel/eagleheights/mptable.c (commented out anyway)
 - asus/p2b-d/mptable.c
 - asus/p2b-ds/mptable.c

Some files still incorrectly contain some smp_write_ioapic() lines from
the original mptable utility target (Supermicro P4DPE), which has one
IOAPIC in the southbridge (Intel ICH3-S), two IOAPICs contained in
the first P64H2, and two more in the second P64H2, i.e. 5 IOAPICs in total.

However, none of the boards where this chunk of code is present has
multiple IOAPICs (and even if they had, the PCI devices where those are
located would probably be different anyway), so drop the incorrect
mptable.c contents.

Also drop the lines from the mptable utility, so that future mptable.c files
don't incorrectly inherit any of this stuff.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-31 19:37:50 +00:00
Scott Duplichan 27612ed4f2 Fix AMD family 10h engineering sample is reported as 'thermal test kit'.
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-31 14:17:51 +00:00