Commit Graph

18953 Commits

Author SHA1 Message Date
Martin Roth fa95625867 util/lint/kconfig_lint: Check default types
The type of the default value wasn't being checked to make sure that it
matched the type of the Kconfig symbol.

This makes sure that the symbol is being set to either a reasonable
looking value or to another Kconfig symbol.

Change-Id: Ia01bd2d8b387f319d29f0a005d55cb8e20cd3853
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16839
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-10-03 22:05:37 +02:00
Martin Roth 3d6db6f0fa google/gale/Kconfig: Change wording of Kconfig option
Everybody knows WHAT they're supposed to do with options, so the text
"Pick this" or "Select to" are redundant.

Change-Id: I327c5be755373e99ca0738593bd78e1084d4d492
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16838
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-10-03 22:05:10 +02:00
Elyes HAOUAS 74295c1fb1 mainboard/packardbell/ms2290: Use tabs for indents
Change-Id: I1559a2541a93a9969ac68708a04f0468790feb69
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16844
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-10-02 19:09:45 +02:00
Elyes HAOUAS e5f3611ce3 mainboard/via/vt8454c: Improve code formatting
Change-Id: Ida10672380f6dffec0daf0073f25f6badfcd83eb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16843
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-02 19:09:28 +02:00
Elyes HAOUAS 5b005196ea mainboard/apple/macbookair4_2: Use tabs for indents
Change-Id: I2714553e2521f8178538755e3cfadec5c1fc6b12
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16842
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-10-02 19:09:07 +02:00
Martin Roth c59cc22e57 vendorcode/amd/pi/Kconfig: update AGESA_BINARY_PI_LOCATION to hex
The AGESA_BINARY_PI_LOCATION Kconfig symbol was declared as a string.
Change it to a hex value.

Change-Id: Ifd87b6c8dfcdf950aea9b15a6fea45bb72e8b4e9
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16835
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-10-02 19:08:33 +02:00
Martin Roth 3b87812f00 Kconfig: Update default hex values to start with 0x
Kconfig hex values don't need to be in quotes, and should start with
'0x'.  If the default value isn't set this way, Kconfig will add the
0x to the start, and the entry can be added unnecessarily to the
defconfig since it's "different" than what was set by the default.

A check for this has been added to the Kconfig lint tool.

Change-Id: I86f37340682771700011b6285e4b4af41b7e9968
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16834
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-10-02 19:08:15 +02:00
Furquan Shaikh cc3365a039 TPM2: Fill in empty tlcl_resume function in TPM2 tlcl
On resume, TPM2_Starup(STATE) command needs to be sent to the TPM. This
ensures that TPM restores the state saved at last Shutdown(STATE).

Since tlcl_resume and tlcl_startup both use the same sequence for
sending startup command with different arguments, add a common function
that can be used by both.

BUG=chrome-os-partner:58043
BRANCH=None
TEST=Verified that on resume coreboot no longer complains about index
read for 0x1007. Return value is 0 as expected.

Change-Id: Ib8640acc9cc9cdb3ba5d40e0ccee5ca7d67fa645
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/16832
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-10-02 19:07:29 +02:00
Arthur Heymans 5db043f0d6 apple/imac52: add mainboard
Add Imac5,2 based on macbook2,1 port.

Change-Id: I34c8313c32920b02a2b964d8718e5b2b6b5a6820
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16638
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-02 19:06:55 +02:00
Nico Huber a90c7859d9 mb/kontron/ktqm77: Let suspend LED flash slowly in S3/S4
Change-Id: Idb37abea01831631aadba66ecd42bc7df03aa857
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/16727
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 22:30:55 +02:00
Nico Huber bbda950e13 sio/winbond/w83627dhg: Add ACPI function to control suspend LED
Change-Id: Ie2062672233141b6f34625e59cbb50238be0b5fa
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/16726
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 22:30:38 +02:00
Teo Boon Tiong 2fc06c8203 soc/intel/skylake: Add config option for Skylake-H Sku support
Change-Id: Ia9c1c065f20bf2b37afc7485ef8df3abd35e2f14
Reviewed-on: https://review.coreboot.org/16607
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 22:30:02 +02:00
Teo Boon Tiong f95daa510d superio/nuvoton: Add back Nuvoton NCT6776 support
Revert commit 53552cc0 (Drop SuperIO nuvoton/nct6776),
removing the code as no other mainboard uses it.

The board Intel Saddle Brook uses this device, so add the
code back with minor adaptations.

Change-Id: I546879285ad8336e81798d0fbdf94f72e1fa61a2
Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com>
Reviewed-on: https://review.coreboot.org/16519
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 22:29:18 +02:00
Martin Roth 3674c8240d soc/intel/apollolake: Try to update BSP microcode from cbfs
The microcode for the BSP gets loaded early from the fit table, but in
case we have newer microcode in cbfs, try to load it again from cbfs.

BUG=chrome-os-partner:53013
TEST=Boot and verify that microcode tries to load into the BSP.

Change-Id: Ifd6c78d7b0eec333b79e0fe5cb6a81981b078f5d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16829
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-10-01 22:28:57 +02:00
Antonello Dettori 6b63990602 southbridge/broadcom/bcm5785: transition away from device_t
Replace the use of the old device_t definition inside
southbridge/broadcom/bcm5785.

Change-Id: I091b07439ff918efa52cf8f8270484131fd0cec5
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16690
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 17:39:54 +02:00
Antonello Dettori ca159f0fb3 northbridge/via/cn700: transition away from device_t
Replace the use of the old device_t definition inside
northbridge/via/cn700.

Change-Id: Ib7761697daad3c459f3568e5158f925199bcd919
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16689
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 17:39:33 +02:00
Antonello Dettori 76e8c00be6 cpu/amd/model_fxx: transition away from device_t
Replace the use of the old device_t definition inside
cpu/amd/model_fxx.

Change-Id: Iac7571956ed2fb927a6b8cc88514e533f40490d0
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16437
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 17:39:05 +02:00
Antonello Dettori 97c460a2d1 biostar/am1ml: transition away from device_t
Replace the use of the old device_t definition inside
mainboard/biostar/am1ml.

Change-Id: Iba2fff5617c62152355b54e446517ad36108aa31
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16688
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-10-01 17:38:50 +02:00
Sumeet Pawnikar 62a193899c mainboard/google/reef: Update DPTF policy temp. values for CPU
This patch increases the CPU specific passive temp. trip point
and critical temp. trip point value for DPTF policy.

BUG=chrome-os-partner:57903
TEST=Built, booted on reef and verified this passive and
critical temp. trip points with heavy workload.

Change-Id: I2a38d01a6539c1bd478f8716c4b543ebcd1f2080
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/16766
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
2016-10-01 17:38:16 +02:00
Aaron Durbin c6452bb8c5 mainboard/google/reef: unconditionally set MAINBOARD_FAMILY
For all mainboard variants use the "Google_Reef" family by default
which is populated in SMBIOS tables. A variant can provide their own
value if needed, but "Google_Reef" can reside as the family without
having to add conditions for each variant when MAINBOARD_FAMILY
have to be overridden.

BUG=chrome-os-partner:56677

Change-Id: Ic214eae1e6473b32f4cb442c09c34355357e1257
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16813
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
2016-10-01 17:37:43 +02:00
Elyes HAOUAS 08449eb583 mainboard/amd/serengeti_cheetah: Use tabs for indents
Change-Id: If47f0c072399fe8291bd8e41920d828f649ec49f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16817
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-10-01 09:11:10 +02:00
Elyes HAOUAS 75b2237473 mainboard/*/*/*/usb.asl: Use tabs for indents
Change-Id: Id46a0c4ca59dc7224c2eedd674ea3a5486509de1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16824
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:38:34 +02:00
Elyes HAOUAS 728273eebf mainboard/gigabyte/m57sli/romstage.c: Use tabs for indents
Change-Id: Ib439e5d96543790d17934bd477af62d39a5958b6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16815
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:35:47 +02:00
Elyes HAOUAS b4d8257dff mainboard/jetway/j7f2: Use tabs for indents
Change-Id: Id97981a05ce4af371c765c6950ed504557b0a584
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16825
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:35:24 +02:00
Elyes HAOUAS c3d490cc24 mainboard/winent/mb6047: Use tabs for indents
Change-Id: Iaf5ad440cfc2bbe08ea9f6c545e5e314645c8893
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16823
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:35:03 +02:00
Elyes HAOUAS bbcb8bc971 mainboard/kontron/ktqm77: Use tabs for indents
Change-Id: I3040dc9a2534a77087805ee61c4f91d1bdb4d509
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16822
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:34:45 +02:00
Elyes HAOUAS 075ff736f6 mainboard/digitallogic/msm800sev: Use tabs for indents
Change-Id: I39ad6606869f059b2ef0c45d6741b844b3791655
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16821
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:34:28 +02:00
Elyes HAOUAS dae8fe747c mainboard/gigabyte/ga-b75m-d3v: Use tabs for indents
Change-Id: I36011719f79da4a9ab2aaeb92ffb0506b4373143
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16816
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:33:51 +02:00
Elyes HAOUAS cb6b120e93 mainboard/gigabyte/ga-b75m-d3h: Use tabs for indents
Change-Id: I038e5cea654d1760ddb2c403c651d8f75e021251
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16819
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:33:28 +02:00
Elyes HAOUAS cf81bd3002 mainboard/samsung/stumpy: Use tabs for indents
Change-Id: I1ffee53a04df6874f658feb3d6ce7d5c7b922837
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16818
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:33:16 +02:00
Elyes HAOUAS 117fd8d645 mainboard/kontron/986lcd-m: Use tabs for indents
Change-Id: Ibeb0da2f75b4aec32f5238e5634bc1f1d8220b84
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16820
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:32:39 +02:00
Martin Roth 80fa9d899c google/reef: Fix default values in Kconfig
These default values weren't being set with the default
keyword so were ending up with different values.

from the default generated config file before this change:
CONFIG_DRIVER_TPM_I2C_BUS=0x9
CONFIG_DRIVER_TPM_I2C_ADDR=0x2
CONFIG_DRIVER_TPM_I2C_IRQ=-1

Change-Id: I19514d0c9b2a9b7e479f003a4d3384e073f4d531
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16828
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-30 23:57:12 +02:00
Martin Roth 311fb696cf Kconfig: Prefix hex defaults with 0x
Because these variables had "non-hexidecimal" defaults, they
were updated by kconfig when writing defconfig files.

Change-Id: Ic1a070d340708f989157ad18ddc79de7bb92d873
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16827
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-30 23:57:02 +02:00
Elyes HAOUAS 48a0129d97 mainboard/google/stout/romstage.c: Use tabs for indents
Change-Id: I2402648b8c0b9dcc730ce7f099e1e4ccef3b79fc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16814
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-30 20:27:55 +02:00
Nico Huber bc97b4e37d soc/intel/fsp_broadwell_de/uart: Drop it
A copy of our uart8250io driver sneaked in with Broadwell-DE support.
The only difference is the lack of initialization (due to FSP handling
that).

TEST=manually compared resulting object files

Change-Id: I09be10b76c76c1306ad2c8db8fb07794dde1b0f2
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/16786
Tested-by: build bot (Jenkins)
Reviewed-by: York Yang <york.yang@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-30 18:18:01 +02:00
Arthur Heymans 0b9ecb5831 mb/intel/d945gclf: Allow use of native graphic init
Add PCI device id to native graphic init and add the Native graphic init
option in Kconfig.

Change-Id: I136122daef70547830bcc87f568406be7162461f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16512
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 17:12:36 +02:00
Arthur Heymans b59bcb2d5f i945/gma.c: add native VGA init
This reuses the Intel Pineview native graphic initialization
to have output on the VGA connector of i945 devices.

The behavior is the same as with the vendor VBIOS BLOB.
It uses the external VGA display if it is connected.

Change-Id: I7eaee87d16df2e5c9ebeaaff01d36ec1aa4ea495
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16511
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 17:11:54 +02:00
Arthur Heymans 7dfc8a5ebd i945/gma.c: use linux code to calculate divisors
The code to compute n, m1, m2, p1 divisors is not correct in coreboot and
on some targets hits a working mode at lower refresh rate, which is why
display is working on some targets.

The divisors must be such "refclk * (5 * (m1 + 2) + (m2 + 2))/ (n + 2)
/ (p1 * p2)" is as close as possible to the target frequency (which
is defined by the resolution and refresh rate).

This patch also fixes the reference frequency.

This patch reuses linux (4.1) code from drivers/gpu/drm/i915/intel_display.c
to correctly compute divisors.

The result is that some previously not working displays, like many
displays found on the Lenovo T60 might work now.
Some examples of T60 displays that were known to not work (in payload):
Samsung LTN141XA-L01 (14.1" 1024x768)
LG-Philips LP150X09 (15.1" 1024x768)
IDtech N150U3-L01 (15.1" 1600x1200)
IDtech IAQX10N (15.1" 2048x1536)
Samsung LTN154X3-L0A (15.4" 1280x800)
LG-Philips LP150E06-A5K4 (15.1" 1400x1050)

Tested on T60 with 1024x786.

Change-Id: I2c7f3bb0024ac005029eaebe3ecdc70c38ac777e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16504
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 17:11:40 +02:00
Vadim Bendebury 494d398ae4 vboot: clear tpm when required
Function which invoked when TPM clear is requested was left empty,
this patch fixes it.

BRANCH=gru
BUG=chrome-os-partner:57411
TEST=verified on a chromeos device that tpm is in fact cleared when
     CLEAR_TPM_OWNER_REQUEST is set by userland.

Change-Id: I4370792afd512309ecf7f4961ed4d44a04a3e2aa
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/16805
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-09-30 03:08:22 +02:00
Lee Leahy d677d9cedd Documentation/Intel/Soc: Update Quark FSP build instructions
Update the FSP build instructions for Quark:
* Discuss multiple types

BRANCH=none
BUG=None
TEST=Build Quark FSP using new instructions

Change-Id: Ibc4bfe32d0eb3877d3b988bc185c73be58d44878
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16826
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:18:04 +02:00
Lee Leahy 31f5c130b1 mainboard/intel/galileo: Make FSP 2.0 the default
Switch from FSP 1.1 to FSP 2.0 as the default build.

BRANCH=none
BUG=None
TEST=Build and run on Galileo Gen2

Change-Id: Icbb3a36cdde68baf4d68fbfc371f8847c56e1162
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16810
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:17:41 +02:00
Lee Leahy 5a9ca4d1ec drivers/intel/fsp2_0: Fix debug display support
Fix errors in debug display support.

BRANCH=none
BUG=None
TEST=Build FSP 2.0 (SEC/PEI core with all FSP debug on) and run on
Galileo Gen2

Change-Id: I2ece056d66dc8568a7b7206970f20368ec5bf147
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16809
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:17:20 +02:00
Lee Leahy 44ec92a48d soc/intel/quark: Fix FSP 2.0 build
Fix the build issues with FSP 2.0:
* Remove struct from the various data structures.
* Properly display the serial port UPDs.
* Change chipset_handle_reset parameter type

BRANCH=none
BUG=None
TEST=Build FSP 2.0 (SEC/PEI core with all FSP debug off) and run on
Galileo Gen2

Change-Id: Icae578855006f18e7e5aa18d2fd196d300d0c658
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16808
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:16:51 +02:00
Lee Leahy 54f857b29e soc/intel/quark: Support multiple version of FSP
Add support for multiple versions of FSP.

BRANCH=none
BUG=None
TEST=Build FSP 1.1 (SEC/PEI core, with all FSP debug off) and run on
Galileo Gen2

Change-Id: Ie7e7f0f883c4d3bfcb18fa25571e505cdde00b2d
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16807
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:16:25 +02:00
Lee Leahy e1654235fd mainboard/intel/quark: Add FSP selection values
Add Kconfig values to select the FSP setup:
* FSP version: 1.1 or 2.0
* Implementation: Subroutine or SEC/PEI core based
* Build type: DEBUG or RELEASE
* Enable all debugging for FSP
* Remove USE_FSP1_1 and USE_FSP2_0

Look for include files in vendorcode/intel/fsp/fsp???/quark

BRANCH=none
BUG=None
TEST=Build FSP 1.1 (subroutine) and run on Galileo Gen2

Change-Id: I3a6cb571021611820263a8cbfe83e69278f50a21
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16806
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:15:44 +02:00
Elyes HAOUAS 127b5d1270 mainboard/asus/kfsn4-dre_k8/romstage.c: Use tabs for indents
Change-Id: If6b36ebef49dd2733d272f990bb7c6623d4ab1b1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16785
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29 23:52:13 +02:00
Elyes HAOUAS 0c31a677b0 mainboard/via/epia-m850/romstage.c: Remove unnecessary whitespace
Change-Id: Ic5359f794c64a9a67ec9e059af337a65073baff4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16784
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: Martin Roth <martinroth@google.com>
2016-09-29 23:51:48 +02:00
Elyes HAOUAS aabd7203a8 mainboard/lanner/em8510: Use tabs for indents
Change-Id: Ib6191c590144438d7d9d6772d792a83e92d5516a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16783
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29 23:51:19 +02:00
Elyes HAOUAS 0e505f1bfe mainboard/iwill/dk8_htx: Use tabs for indents
Change-Id: I303270a45171dda88b7661e3797fd3724e3b055f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16782
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29 23:51:01 +02:00
Elyes HAOUAS 129c26e5ea mainboard/gigabyte/ga_2761gxdk: Use tabs for indents
Change-Id: Ie752fe0a74acd4b79711596e56fc5ebf83884a0d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16779
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29 19:23:26 +02:00