383f5f6897
get_bus_freq()
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1204 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:17:04 +00:00
97c211e70f
memory turn-on
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1203 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:16:35 +00:00
079d53232b
get pci ops right
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 19:07:39 +00:00
47e64e8bed
missing directive
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 19:06:53 +00:00
83b991afff
- O2, enums, and switch statements work in romcc
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- Support for compiling romcc on non x86 platforms
- new romc options -msse and -mmmx for specifying extra registers to use
- Bug fixes to device the device disable/enable framework and an amd8111 implementation
- Move the link specification to the chip specification instead of the path
- Allow specifying devices with internal bridges.
- Initial via epia support
- Opteron errata fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11 06:20:25 +00:00
080038bfbd
remove SMBUS_MEM_DEVICE_[START|END] traces from code.
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add 8mbit example config for amd solo.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-07 14:56:48 +00:00
198f0ddded
add missing -m32 flag to compile on opteron natively
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-06 15:08:03 +00:00
a84c6f81ef
add smbus_write_byte() function. currently fails in romcc :(
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-06 15:04:41 +00:00
2e90c1daa0
no hardcoded addresses!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:16:19 +00:00
5b3b9aa5de
standard functions
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1195 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:15:48 +00:00
b6a259b0d2
no need for assembly
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:15:10 +00:00
e046fbbb2c
new cpu types
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:14:42 +00:00
be956f096f
size memory
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:13:12 +00:00
ccf4d34bb7
use standard name
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:12:56 +00:00
95ae7c1e5c
pci.S moved into arch/ppc/lib/pci_ops.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1190 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:11:52 +00:00
be84533ed6
getting options right
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1189 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:10:52 +00:00
5ebf4d3431
- Modify the code to C style indenting.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-03 02:53:02 +00:00
fae510cd84
Some timing in here, but we don't set; it breaks.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 23:33:01 +00:00
ee163f3c18
ram size now set from SPD.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1178 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 22:54:43 +00:00
a70483b83b
First SPD code in and working!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 22:48:28 +00:00
cb3f498296
success. It boots as a bproc slave now.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 18:16:07 +00:00
53311091a6
Fixes but config tool still sucks on this.
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Sigh, two passes here we come? DAMMIT!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1175 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 04:16:30 +00:00
6dd6c68507
IRQ setup for EPIA
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 00:08:42 +00:00
e0005ba6d1
fix sizing of PCI IRQ table in the Config.lb (there are only 5 slots)
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But linux still refuses to believe this table. What's odd is this is the identical table used in V1. Damn.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 23:18:14 +00:00
7cf52c979f
fixes for epia.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1172 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 22:25:36 +00:00
14e72218f3
uses statement missing
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 21:14:52 +00:00
6358a4a003
default USE_FALLBACK_IMAGE to 0
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 17:28:48 +00:00
848d336534
vga support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 16:09:23 +00:00
ab1f217161
some quartet memory init updates.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 14:12:57 +00:00
8e05d42bf8
512kflash builds in epia.512kflash
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1167 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 05:43:09 +00:00
08febd8b67
new epia target for 512k: targets/via/epia/Config.512kflash.lb
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buildtarget now takes either a directory, and uses directory/Config.lb, or
takes a file
epia defaults to 256k flash
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1166 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 05:42:31 +00:00
320c6a0102
Fixes to the smbus code. Now for the fun.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 01:45:43 +00:00
c18170b241
more fixes for via ... plus a little more spew.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 23:53:45 +00:00
303349a9d2
fix and complaint.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1163 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 18:18:22 +00:00
00359e91ec
remove references to static_devices.o
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 12:02:24 +00:00
fd5d0a5f05
get rid of static_devices.c
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don't use mptable on solo, it's not an SMP system.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 11:52:49 +00:00
a1d2c58c36
no filo, since khepri has no ide disks per default
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1160 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 09:52:37 +00:00
99dcf231f4
The epia now works.
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Now to fix the ram ...
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 02:16:47 +00:00
02360d6672
default is 256 not 512k
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1158 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-29 11:36:01 +00:00
67a1cb3207
ok that's it. I think this might work.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1157 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-27 04:28:39 +00:00
864a3d3474
a few tweaks etc.
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Still probably wrong.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1156 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-27 04:18:31 +00:00
6e5fe1d6fe
it's getting through the 8601 but the values are still not right.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1155 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 23:22:31 +00:00
854d234a06
something is wrong here but not sure what.
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But nothing is getting set into the north bridge.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 22:45:54 +00:00
f3c17ca234
via epia is putting out bytes!
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ron
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 22:10:53 +00:00
42acd12cbc
serial supprt.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 17:41:21 +00:00
11dbdf5d78
just to get us back where we were.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 17:16:14 +00:00
430111b9d1
It builds!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 16:12:23 +00:00
aa4b4e031f
add cpufixup.o
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 15:55:11 +00:00
9b4457afb0
cpu fixup for p6
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1148 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 15:54:34 +00:00
737fe21ebd
remove fixed ROM_SIZE setting, add default to 256k
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 15:36:03 +00:00
Greg Watson