Commit Graph

1785 Commits

Author SHA1 Message Date
Kyösti Mälkki e773c92ef4 Make mainboard_ops and mainboard.c file optional
This provides weak empty declaration for mainboard_ops.
The struct chip_operations is not defined for __PRE_RAM__ so
the declaration is also moved upwards in the output.

Change-Id: I101f0b8b9f0a55fb51a7c6475d53cc588c84026d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1931
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-29 10:25:13 +01:00
Patrick Georgi f33e395213 build system: Split linking into multiple steps
After collecting dependencies for ramstage, add an intermediate step
in which object files are linked per directory. The results are then
linked into the final binary.

This reduces the maximum command line length and might also help with
future use of LTO linking.

Also adapt the lint test for build dir handling, since printall
doesn't provide individual object files for ramstage anymore.

Change-Id: Ie40febd8c1eaf4609944eedeab46d870639e53df
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1911
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-27 22:02:02 +01:00
Patrick Georgi b6f765e7c8 Provide weak empty declarations of all chip_ops used on a board
sconfig creates empty defaults for all chip_ops, which can be overridden
by drivers simply by providing a concrete implementation.

Change-Id: Ib37515f0b0747bdbf4da780d28690a1e719944b2
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1567
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-27 21:48:22 +01:00
Patrick Georgi 1a5301dd33 abuild: only rebuild boards if requested or after a broken build
That used to be the behaviour, and it's quite useful to incrementally
fix bugs across the tree.

Change-Id: I3e30cbdcf01631bc29f892054caa3babb0969beb
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1888
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-27 10:07:54 +01:00
Zheng Bao 536b53ea6d xcompile: Add missing XGCCPATH
XGCCPATH is missing in new xcompile.

Change-Id: I177f54189be445404a4a61419064d3c414b8a30c
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1921
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-27 09:22:10 +01:00
Ronald G. Minnich e820e5cb3a Make xcompile support multiple architectures
With this change the the xcompile script now creates environment variables
for more than one architecture.

Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>

Change-Id: I349a1fd1d865ef16979f1dfd6aeca12b1ee2eed6
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/1915
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-11-27 02:06:07 +01:00
Idwer Vollering 6b11c8be45 crossgcc: update to acpica-20121114
Update acpica to release 20121114 and
update patches/ to build with this version of acpica.
Correct the creation of crossgcc-build.log
Bump CROSSGCC_VERSION.

Change-Id: I269454ebc3c78b5852e4a67e55bb5642edad191d
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1861
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-24 08:54:53 +01:00
Patrick Georgi 0a3f2393ae crossgcc: properly test for flex
This is no GNU tool, so testing for "GNU" in the version string
is bound to fail.
We now accept everything that returns success on "flex --version"
and then hope for the best.

I tested both cases

Change-Id: If325f613fde1648847b998b7e8e5782d0f22b484
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1884
Tested-by: build bot (Jenkins)
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-22 08:08:48 +01:00
Kyösti Mälkki 1a2a6eebc5 Cleanup sconfig
Fix side-effects of name translation, treat original name as const.

Change-Id: Iae26be8cefe7db11eeb8e62fce6f3b8bc9c1f4ed
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/799
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-17 02:12:32 +01:00
Stefan Reinauer 17b77ab6aa buildgcc: Print error if flex is missing
flex is needed by acpica. This patch makes the build fail early
instead of after gcc has been compiled, if flex is not there.

Change-Id: Idfd71bdf704ab25de655f1a72c266c5220b15048
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1860
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-16 18:08:06 +01:00
Zheng Bao f6659cac3b nvramtool: fsync for mingw.
Change-Id: Ifdec69ca46ba8cbd3eb154d8f4af4b3cafa8019d
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1805
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-14 09:24:56 +01:00
Stefan Reinauer 632175802e cbfstool: Rework to use getopt style parameters
- Adding more and more optional and non-optional parameters
  bloated cbfstool and made the code hard to read with a lot
  of parsing in the actual cbfs handling functions. This change
  switches over to use getopt style options for everything but
  command and cbfs file name.
- This allows us to simplify the coreboot Makefiles a bit
- Also, add guards to include files
- Fix some 80+ character lines
- Add more detailed error reporting
- Free memory we're allocating

Signed-off-by: Stefan Reinauer <reinauer@google.com>
Change-Id: Ia9137942deb8d26bbb30068e6de72466afe9b0a7
Reviewed-on: http://review.coreboot.org/1800
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-12 18:38:03 +01:00
Stefan Reinauer 2e200cde9a cbfstool: Update LZMA encoder to LZMA SDK 9.12
This removes almost all C++ code (except the wrapper)

Change-Id: I0f84070e3b6dc57c98d49a53150a140479b3221f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1799
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-12 18:35:52 +01:00
Vadim Bendebury 7c6b6bb593 cbmem compilation needs to use the hardened toolchain
The appropriate compiler (provided by the build system) is used to
ensure proper toolchain options are used.

cbmem.c is being modified to suppress pointer to integer typecast
warnings.

Change-Id: Ibab2faacbd7bdfcf617ce9ea4296ebe7d7b64562
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/1791
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-12 17:12:23 +01:00
Stefan Reinauer 4a17d29fe8 ifdtool: Dump more registers from FD
Only thing not decoded now are the PCH straps

ifdtool -d path/to/image.bin
File path/to/image.bin is 4096 bytes
Found Flash Descriptor signature at 0x00000010
FLMAP0:    0x02040003
  NR:      2
  FRBA:    0x40
  NC:      1
  FCBA:    0x30
FLMAP1:    0x12100206
  ISL:     0x12
  FPSBA:   0x100
  NM:      2
  FMBA:    0x60
FLMAP2:    0x00210120
  PSL:     0x2101
  FMSBA:   0x200
FLUMAP1:   0x000004df
  Intel ME VSCC Table Length (VTL):        4
  Intel ME VSCC Table Base Address (VTBA): 0x000df0

ME VSCC table:
  JID0:  0x001740ef
    SPI Componend Device ID 1:          0x17
    SPI Componend Device ID 0:          0x40
    SPI Componend Vendor ID:            0xef
  VSCC0: 0x20052005
    Lower Erase Opcode:                 0x20
    Lower Write Enable on Write Status: 0x50
    Lower Write Status Required:        No
    Lower Write Granularity:            64 bytes
    Lower Block / Sector Erase Size:    4KB
    Upper Erase Opcode:                 0x20
    Upper Write Enable on Write Status: 0x50
    Upper Write Status Required:        No
    Upper Write Granularity:            64 bytes
    Upper Block / Sector Erase Size:    4KB
  JID1:  0x001720c2
    SPI Componend Device ID 1:          0x17
    SPI Componend Device ID 0:          0x20
    SPI Componend Vendor ID:            0xc2
  VSCC1: 0x20052005
    Lower Erase Opcode:                 0x20
    Lower Write Enable on Write Status: 0x50
    Lower Write Status Required:        No
    Lower Write Granularity:            64 bytes
    Lower Block / Sector Erase Size:    4KB
    Upper Erase Opcode:                 0x20
    Upper Write Enable on Write Status: 0x50
    Upper Write Status Required:        No
    Upper Write Granularity:            64 bytes
    Upper Block / Sector Erase Size:    4KB

OEM Section:
00: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
10: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

Found Region Section
FLREG0:    0x00000000
  Flash Region 0 (Flash Descriptor): 00000000 - 00000fff
FLREG1:    0x07ff0180
  Flash Region 1 (BIOS): 00180000 - 007fffff
FLREG2:    0x017f0001
  Flash Region 2 (Intel ME): 00001000 - 0017ffff
FLREG3:    0x00001fff
  Flash Region 3 (GbE): 00fff000 - 00000fff (unused)
FLREG4:    0x00001fff
  Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused)

Found Component Section
FLCOMP     0x64900024
  Dual Output Fast Read Support:       supported
  Read ID/Read Status Clock Frequency: 50MHz
  Write/Erase Clock Frequency:         50MHz
  Fast Read Clock Frequency:           50MHz
  Fast Read Support:                   supported
  Read Clock Frequency:                20MHz
  Component 2 Density:                 8MB
  Component 1 Density:                 8MB
FLILL      0x000060c7
  Invalid Instruction 3: 0x00
  Invalid Instruction 2: 0x00
  Invalid Instruction 1: 0x60
  Invalid Instruction 0: 0xc7
FLPB       0x00000000
  Flash Partition Boundary Address: 0x000000

Found PCH Strap Section
PCHSTRP0:  0x0820d602
PCHSTRP1:  0x0000010f
PCHSTRP2:  0x00560000
PCHSTRP3:  0x00000000
PCHSTRP4:  0x00c8e000
PCHSTRP5:  0x00000000
PCHSTRP6:  0x00000000
PCHSTRP7:  0xc0001ae0
PCHSTRP8:  0x00000000
PCHSTRP9:  0x30000580
PCHSTRP10: 0x00410044
PCHSTRP11: 0x99000097
PCHSTRP12: 0x00000000
PCHSTRP13: 0x00000000
PCHSTRP14: 0x00000000
PCHSTRP15: 0x0000033e
PCHSTRP16: 0x00000000
PCHSTRP17: 0x00000002

Found Master Section
FLMSTR1:   0x0a0b0000 (Host CPU/BIOS)
  Platform Data Region Write Access: disabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      disabled
  Host CPU/BIOS Region Write Access: enabled
  Flash Descriptor Write Access:     disabled
  Platform Data Region Read Access:  disabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       disabled
  Host CPU/BIOS Region Read Access:  enabled
  Flash Descriptor Read Access:      enabled
  Requester ID:                      0x0000

FLMSTR2:   0x0c0d0000 (Intel ME)
  Platform Data Region Write Access: disabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      enabled
  Host CPU/BIOS Region Write Access: disabled
  Flash Descriptor Write Access:     disabled
  Platform Data Region Read Access:  disabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       enabled
  Host CPU/BIOS Region Read Access:  disabled
  Flash Descriptor Read Access:      enabled
  Requester ID:                      0x0000

FLMSTR3:   0x08080118 (GbE)
  Platform Data Region Write Access: disabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      disabled
  Host CPU/BIOS Region Write Access: disabled
  Flash Descriptor Write Access:     disabled
  Platform Data Region Read Access:  disabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       disabled
  Host CPU/BIOS Region Read Access:  disabled
  Flash Descriptor Read Access:      disabled
  Requester ID:                      0x0118

Found Processor Strap Section
????:      0x00000000
????:      0xffffffff
????:      0xffffffff
????:      0xffffffff

Change-Id: I68a613df2fd80e097cdea46fbad104d7c73ac9ad
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1756
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-11-12 06:56:03 +01:00
Vadim Bendebury 6d18fd09c3 Utility to dump boot timing table
Coreboot and u-boot create a table of timestamps which allows to see
the boot process performance. The util/cbmem/cbmem.py script allows to
access the table after ChromeOS boots up and display its contents on
the console. The problem is that shipping images do not include Python
interpreter, so there is no way to access the table on a production
machine.

This change introduces a utility which is a Linux app displaying the
timestamp table. Conceivably the output of this utility might be
included in one of the ChromeOS :/system sections, so it was attempted
to write this procedure 'fail safe', namely reporting errors and not
continuing processing if something goes wrong.

Including of coreboot/src .h files will allow to keep the firmware
timestamp implementation and this utility in sync in the future.

Test:
    . build the utility (run 'make' while in chroot in  util/cbmem)
    . copy `cbmem' and 'cbmem.py' to the target
    . run both utilities (limiting cbmem.py output to 25 lines or so)
    . observe that the generated tables are identical (modulo rounding
      up of int division, resulting in 1 ns discrepancies in some
      cases)

      localhost var # ./cbmem
      18 entries total:

         1:62,080
         2:64,569 (2,489)
         3:82,520 (17,951)
         4:82,695 (174)
         8:84,384 (1,688)
         9:131,731 (47,347)
        10:131,821 (89)
        30:131,849 (27)
        40:132,618 (769)
        50:134,594 (1,975)
        60:134,729 (134)
        70:363,440 (228,710)
        75:363,453 (13)
        80:368,165 (4,711)
        90:370,018 (1,852)
        99:488,217 (118,199)
      1000:491,324 (3,107)
      1100:760,475 (269,150)

      localhost var # ./cbmem.py | head -25

      time base 4249800, total entries 18
      1:62,080
      2:64,569  (2,489)
      3:82,520  (17,951)
      4:82,695  (174)
      8:84,384  (1,688)
      9:131,731  (47,347)
      10:131,821  (89)
      30:131,849  (27)
      40:132,618  (769)
      50:134,594  (1,975)
      60:134,729  (134)
      70:363,440  (228,710)
      75:363,453  (13)
      80:368,165  (4,711)
      90:370,018  (1,852)
      99:488,217  (118,199)
      1000:491,324  (3,107)
      1100:760,475  (269,150)

Change-Id: I013e594d4afe323106d88e7938dd40b17760621c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/1759
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-12 03:35:20 +01:00
Stefan Reinauer cb6fd30155 cbfstool: Remove unused cmd_t
Change-Id: Ib1c05828258b9dc7107920ae6cb25bc92ffa86d1
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1795
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-12 03:26:08 +01:00
Stefan Reinauer 20848ee288 cbfstool: add add-flat-binary command to add raw executables
Example:
cbfstool image-link.bin add-flat-binary u-boot.bin fallback/payload \
	0x100000 0x100020
will add u-boot.bin as fallback/payload with a load address of 0x100000
and an entry-point of 0x10002.

Change-Id: I6cd04a65eee9f66162f822e168b0e96dbf75a2a7
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1792
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-12 03:25:50 +01:00
Stefan Reinauer 3c53d33c78 ifdtool: Add locking/unlocking and dumping of access permissions
ifdtool will now dump access permissions of system comonents to
certain IFD sections:

Found Master Section
FLMSTR1:   0xffff0000 (Host CPU/BIOS)
  Platform Data Region Write Access: enabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      enabled
  Host CPU/BIOS Region Write Access: enabled
  Flash Descriptor Write Access:     enabled
  Platform Data Region Read Access:  enabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       enabled
  Host CPU/BIOS Region Read Access:  enabled
  Flash Descriptor Read Access:      enabled
  Requester ID:                      0x0000

FLMSTR2:   0x0c0d0000 (Intel ME)
  Platform Data Region Write Access: disabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      enabled
  Host CPU/BIOS Region Write Access: disabled
  Flash Descriptor Write Access:     disabled
  Platform Data Region Read Access:  disabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       enabled
  Host CPU/BIOS Region Read Access:  disabled
  Flash Descriptor Read Access:      enabled
  Requester ID:                      0x0000

FLMSTR3:   0x08080118 (GbE)
  Platform Data Region Write Access: disabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      disabled
  Host CPU/BIOS Region Write Access: disabled
  Flash Descriptor Write Access:     disabled
  Platform Data Region Read Access:  disabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       disabled
  Host CPU/BIOS Region Read Access:  disabled
  Flash Descriptor Read Access:      disabled
  Requester ID:                      0x0118

Also, ifdtool -u /path/to/image will unlock the host's
access to the firmware descriptor and ME region.
ifdtool -l /path/to/image will lock down the host's
access to the firmware descriptor and ME region.

Change-Id: I3e081b80a9bcb398772416f143b794bf307b1c36
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1755
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2012-11-09 18:59:42 +01:00
Stefan Reinauer 7a12a32670 Fix abuild output in Jenkins
Ignore the harmless broken pipe messages from "yes"

Building amd/pistachio; i386: ok, using i386-elf-gcc
Using payload /srv/jenkins/payloads/seabios/bios.bin.elf
  Creating config file... (blobs, ccache) yes: standard output: Broken pipe
yes: write error
ok;  Compiling image on 4 cpus in parallel .. ok. (took 10s)

Change-Id: Ic53e246aac3ab6d7ea7a006a8dfac1c3f85797bc
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1813
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-11-09 07:05:18 +01:00
Stefan Reinauer 5e93b37310 Fix Segmentation Fault in ifdtool
If a section is bigger than the FD file it is injected into, and the FD
lies about the size of the FD file, ifdtool would crash because reading
in the section writes beyound the FD file in memory.

Change-Id: Idcfac2b1e2b5907fad34799e44a8abfd89190fcc
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1754
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-11-09 02:07:08 +01:00
Vadim Bendebury d0b860aada Add utility for parsing/modifying DTD array
Detailed timing descriptor (DTD) is an 18 byte array describing video
mode (screen resolution, display properties, etc.) in Intel Option
ROM. Option ROM can support multiple video modes, specific mode is
picked by the BIOS through the appropriate Option ROM callback
function.

The new utility allows to interpret the 18 byte hex DTD dump, and/or
modify certain values, and generate a new DTD.

To parse the DTD contents just pass the 18 bytes to the utility in the
command line. To modify the existing contents and generate a new dump
precede the 18 bytes with '-m' and follow prompts.

Change-Id: Ib00bdaf42c350b98b5a48d08e6bb347b5ec25a8b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/1711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-08 20:21:19 +01:00
Vadim Bendebury 00ba25decb Get more informative output from cbmem.py
This is a cosmetic change which formats timestamp information
retrieved by cbmem.py.

Instead of printing timestamps in a single line, print them one per
line and add time (in us) elapsed since the previous timestamp.

     time base 4149594, total entries 18
     1:56,928
     2:58,851  (1,923)
     3:175,230  (116,378)
     4:175,340  (109)
     8:177,199  (1,859)
     9:214,368  (37,168)
     10:214,450  (81)
     30:214,462  (11)
     40:215,205  (743)
     50:217,180  (1,974)
     60:217,312  (132)
     70:436,984  (219,671)
     75:436,993  (8)
     80:441,424  (4,431)
     90:442,487  (1,062)
     99:553,777  (111,289)
     1000:556,513  (2,736)
     1100:824,621  (268,107)

Change-Id: I0d25cafe766c10377017697e6b206276e1a92992
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/1716
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-08 19:39:06 +01:00
Vadim Bendebury f27d36c361 Fix cbmem to work on 64 bit platforms
For some reason which I fail to understand, specifying endiannes using
'@' (which means 'native' and should be the same as '<' on x86
platforms) causes cbmem.py to crash the machine on 64 bit systems.

What happens is that the addresses read from various table headers'
struct representations do not make sense, when bogus address gets
passed to get_phys_mem, the crash happens while that function is
executed.

dlaurie@ found out that replacing "@" with "<" in fact fixes the
issue. After some investigation I am just submitting this fix without
much understanding of the root cause.

Change-Id: Iaba9bc72a3f6b1d0407a5f1e3b459ccf5063969d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/1715
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-08 19:38:59 +01:00
Stefan Reinauer a90bd527d9 cbfstool: add offset parameter to create command
CBFS allows coreboot rom images that are only partially covered
by the filesystem itself. The intention of this feature was to
allow EC / ME / IMC firmware to be inserted easily at the beginning
of the image. However, this was never implemented in cbfstool.

This patch implements an additional parameter for cbfstool.

If you call cbfstool like this:
cbfstool coreboot.rom create 8192K bootblock.bin 64 0x700000
it will now create an 8M image with CBFS covering the last 1M of
that image.

Test:
     cbfstool coreboot.rom create 8192K bootblock.bin 64 0x700000
     creates an 8M image that is 7M of 0xff and 1M of CBFS.

Change-Id: I5c016b4bf32433f160b43f4df2dd768276f4c70b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1708
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-08 19:38:26 +01:00
Stefan Reinauer 746d174347 cbfstool: respect dependencies when building locally
cbfstool was not looking at any dependencies when building
by running make in util/cbfstool. By fixing this it's not
required to make clean every time you edit a file in there.

Change-Id: I544fd54d4b9dd3b277996c21ade56dc086b84800
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1707
Reviewed-by: Marc Jones <marcj303@gmail.com>
Tested-by: build bot (Jenkins)
2012-11-07 18:29:18 +01:00
Kyösti Mälkki a93c3fe7f0 Drop redundant CHIP_NAME in mainboard.c
Compose the name from Kconfig strings instead.

As the field is for debug print use only, a minor change in the output
should do no harm. The strings no longer include word "Mainboard".

Change-Id: Ifd24f408271eb5a5d1a08a317512ef00cb537ee2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1635
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-06 21:59:21 +01:00
Idwer Vollering 336db54a00 crossgcc: build expat and python in silence
Don't let expat and/or python show the compile process on stdout.
Instead direct this output to crossgcc-build.log.

Fix the logfile path for python.

Change-Id: I431dabf6955d7eef3e54c96d0fb11b92d1cee96d
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1667
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-02 20:08:01 +01:00
Nico Huber aa5eae629f inteltool: Add output of 64bit registers in PMBASE
Output values of 64bit registers and fix settings for GPE0_EN for
ICH9/10.

Change-Id: I8ca6b32500331707670972b38466345f581844cd
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1625
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-27 02:54:23 +02:00
Idwer Vollering 573d37da02 crossgcc: update to Python 2.7.3
Change-Id: I9db10e8c7dcd693cc4ab935c587da02dd7eb2bc5
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1621
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-27 02:32:11 +02:00
Idwer Vollering 296a015b8a crossgcc: update to expat 2.1.0
Change-Id: Id0b736d402b33138e27b18c74e5ed8ffab0bcccb
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/1620
Tested-by: build bot (Jenkins)
2012-10-27 02:31:58 +02:00
Idwer Vollering cd02793dff crossgcc: update mingw w32api's download URL
Correct the download URL of mingw's w32api.

Change-Id: I98fb43c121399c23f6693ade5cd3b42bc9463724
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1619
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-26 13:03:16 +02:00
Zheng Bao 04ceed6a0f buildgcc: redirect error output to /dev/null
Change-Id: I7cd63248eb8abb711cecce41e3f8a282b34aa126
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1548
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-10-26 12:51:15 +02:00
Idwer Vollering 908b043da0 crossgcc: update to mingwrt 3.20-2
This patch updates crossgcc to download and compile mingwrt 3.20-2

Change-Id: Ic5ed2df4c3643e469a62c51643d3fc756eb3e615
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1617
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: build bot (Jenkins)
2012-10-26 01:58:52 +02:00
Idwer Vollering 655a65c139 crossgcc: update to binutils 2.23
This patch updates crossgcc to download and compile binutils 2.23

Change-Id: I75a24ce6fb9f6ac7ae53671314c410b9b0d80aa8
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1615
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-25 09:24:26 +02:00
Idwer Vollering 7962fc7684 crossgcc: update to MPC 1.0.1
This patch updates crossgcc to download and compile MPC 1.0.1

Change-Id: I7a2a21afc8c26e4fb7b6553c7fd98cc054d01570
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1614
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-25 09:23:21 +02:00
Idwer Vollering 27efb4cd3f crossgcc: update to MPFR 3.1.1
This patch updates crossgcc to download and compile MPFR 3.1.1

Change-Id: I6c479db5d6d632dcc2201c3771b43e2b663877e1
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1613
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-25 09:21:51 +02:00
Idwer Vollering fedb63a988 crossgcc: update to GDB 7.5
This patch updates crossgcc to download and build GDB 7.5

Change-Id: I38fc3591396f072ead399b22f516ec765480ea40
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1612
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-25 09:20:04 +02:00
Idwer Vollering 1cfee0bc10 crossgcc: update to gcc 4.7.2
Update crossgcc to use gcc 4.7.2.
This requires a minor change to util/crossgcc/buildgcc as well.

Tested on hardware with asus/p2b and lenovo/x60.

Change-Id: Ia3921844670ca99741e5715def14dd969f305ab7
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1609
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-25 06:27:39 +02:00
Idwer Vollering cbd631284d crossgcc: fix compilation of acpica
Compilation of acpica-20120420 is broken (and old, but I'll take care
of that in a future patch),
let's fix that ("Building IASL 20120420 ... failed").

Change-Id: If5fd5cd93d748f78b7c059323f9f810666e32cc7
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/1607
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-25 06:27:17 +02:00
Zheng Bao def50b061d kconfig: Some terms or curses libraries treat backspace as 0x08
Change-Id: Ie4e4a2f0d68643a8f46d24ee7bd1b953e9fe14a5
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1605
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-23 05:05:53 +02:00
Zheng Bao 545167252d build: build coreboot on mingw.
regex, pdcurses, wsock(for itohl) are seperated libraries. mmap and unmmap are
ported from git.

Issues:
1. The length of command line is limited. That makes the Thather can not be built
  because too many obj.o need to be built.

Change-Id: I1d60ec5c7720c1e712e246c4cd12e4b718fed05f
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1604
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-10-22 21:49:54 +02:00
Zheng Bao c31cdd8662 cbfstool: Add -mno-ms-bitfields on (mingw)
The default gcc on mingw will process the __attribute__ ((packed)) in
a different way other than non-win system.

Change-Id: Iac9f4476c922472d0b447f1c3ef60e8e13bd902f
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1603
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-10-22 21:49:46 +02:00
Stefan Tauner fba86bfaa8 inteltool: improve the libpci test in the Makefile
Use the verbatim variable method to define and export test code and
the actual libpci test from flashrom. This improves readability and
will work with stricter compiler (settings).

Change-Id: Iace7d53b0b992c4fde596ce1d606ad715d6dfc2a
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/1575
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-10-19 19:32:24 +02:00
Stefan Tauner 1a00cf0632 inteltool: add support for 946GZ and 946PL
Change-Id: Ied0ff16c16d8c2f04b55fe6b0a6ee38966d3c424
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/1576
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-10-19 10:27:53 +02:00
Stefan Tauner 04c06005eb inteltool: new definitions and cleanup
- Separate host bridges/DRAM controllers from LPC controllers in supported_chips_list[].
 - Refine some names and macros.
 - Clean up some whitespace errors.

 - Add IDs and names of 5, 6 and 7 Series southbridges and the three
   latest Core CPU families with integrated memory controllers but do
   not implement any pretty printing routines for them yet.

   The first generation Core family is already supported, although it
   was wrongly named after the PCH and used the wrong ID. Also, the BAR
   values have been mangled to 32b instead of 64b. Both errors have been
   fixed and most basic support for the other two generations was added.

Change-Id: Ief81e57f7c065cafac52e48b6364b57c72fcdf95
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/1574
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-10-19 09:57:51 +02:00
Stefan Tauner f450b8619e inteltool: remove bashism from Makefile
&> is a bashism to redirect both outward streams (stdout and stderr), but
with other shells this introduces a race condition with the rm command
after it, because the compiler execution is done in the background/
in parallel. Found and tested with dash.

Change-Id: I08516494828c9f7af168f954f2df027372657867
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/1573
Tested-by: build bot (Jenkins)
Reviewed-by: Bernhard Urban <lewurm@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-14 22:22:59 +02:00
Zheng Bao 36156ffa1e crossgcc: Allow the non-gnu tar and patch work on XxxBSD
For BSD, patch and tar are not default GNU. Add a work around
to let the non-gun patch and tar work.

Change-Id: I0a9d0bb0e535aa5e0dde146db330c3c8d7b4d8cb
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1502
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-10-14 20:15:46 +02:00
Patrick Georgi c31e3ac258 abuild: allow building with no payload
Change-Id: I167f0bb57bb40f0426182c0abe868bdad58eb120
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1563
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-10-14 20:10:15 +02:00
Kyösti Mälkki aada2e127b Every chip must have chip_operations
Forcing this rule, chip_ops can be added in the static devicetree
regardless of the existence of the chip.h files.

Change-Id: Iec1c23484e85cab3f80a34f2b082088f38ac4de9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1472
Tested-by: build bot (Jenkins)
2012-10-08 13:24:31 +02:00
Zheng Bao 9b757dccdc lint: Get absolute path in compare_output
The classes in $(top)/Makefile uses $(abspath) to get the path.
The $(abspath) can not resolve symlink. If the coreboot is located
in a symlink directory, the run_printall produces the absolute
path while the $PWD just produces the path with symlink. Use
`pwd -P` to get the abs path.

Change-Id: Icf6b364d030c14a9c78991767b17dafc701baf3c
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1551
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-10-05 22:06:04 +02:00
Zheng Bao 684b8ab309 lint: Stop searching when one GNUmake is found
After make 3.81 is copied to /usr/local/bin, the old make 3.80, which
doesn't work for coreboot, will replace $MAKE with gnumake. That is not
we want.

Change-Id: I87fbe95c70228a22f2c233ff071df29639b63726
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1550
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-10-04 11:02:02 +02:00
Andriy Gapon 89397fc342 superiotool: Fix for FreeBSD
Makefile still used SVNDEF on FreeBSD.

Change-Id: I45c7fbc66c33e82a2146ef7df87b63bc7edea4cd
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1554
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-10-03 09:26:59 +02:00
Zheng Bao b13e94c2c6 nvramtool: uname in NetBSD doesnt take "-o"
see the Netbsd manual:
http://netbsd.gw.com/cgi-bin/man-cgi?uname++NetBSD-current
Error output needs to be redirected.

Change-Id: I1853a0162e14be0ee9d7971466499af6c72b2427
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1545
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-09-28 14:50:02 +02:00
Zheng Bao 82c06bd2d5 nvramtool: Require no hw access for integrated Makefile
The Makefile.inc is integraged into coreboot Makefile. It doesn't
need to access to HW like cmos. It doesn't include cmos-hw-unix.c,
which is only for individual tools running seperatedly.

Change-Id: Ib00b5c3da63acb4120cb23eb7d661c5bc75d7c86
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1544
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-09-28 14:49:21 +02:00
Zheng Bao 533bca80ed lint: Add template for mktemp to meet BSD requirements
Change-Id: I86cecf6aee1fcb682cb32bd0f03e014fd1afe594
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1549
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-09-28 14:46:37 +02:00
Patrick Georgi 80d2526c72 abuild: abort if payload.sh failed
With this chance it becomes practical to have payload.sh build/update
the payload, and abort abuild if something bad happened.

Change-Id: Iee25de2e8b62153c477b8e5d32e097b59797523c
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1536
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-09-25 16:08:53 +02:00
Patrick Georgi 5c63761c37 nvramtool: Read/write binary data as binary
Only relevant on windows (and nvramtool currently fails there), but
it doesn't hurt.

Change-Id: I5d6420c1f9dc49cf3af31e75088e51a90f729e01
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1535
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-09-25 16:08:23 +02:00
Zheng Bao 5b209c0718 crossgcc: Change the term color back (trivial)
Change-Id: I6a7852eef32a3440c9d29e45420cb21d2db8c404
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1528
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-09-20 09:25:46 +02:00
Zheng Bao 615304c667 lint: Dont highlight the matching text in grep
Sometimes we like to make grep auto-highlight the match text by
setting the GREP_OPTIONS. This will make the compare_output
in lint-002 catch the difference between 2 strings which text are
same but color are different. Override the GREP_OPTIONS.

Change-Id: Ia257214fe5149e084e8eac3fb551a494eaa46ae6
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1526
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-09-17 10:37:21 +02:00
Patrick Georgi b3a18acb56 Isolate Kconfig host compiler options
This reverts commit 645f2dd5d9.

Instead of adding a special case to nvramtool to avoid it
picking up Kconfig's regex.h, have the host compiler only
consider util/kconfig for includes (ie. -Iutil/kconfig)
for kconfig related object files.

Change-Id: Ie4f97ce38cb3e911f6e6c1e5b6f86f6998d93f69
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1509
Tested-by: build bot (Jenkins)
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-09-14 07:33:07 +02:00
Rudolf Marek 73ab60a9d4 Fix ramstage location in trace scripts
The ramstage location has been changed. Reflect this in the script.

Change-Id: I76c9b38a8ffe2188e94146e845d23536625c0979
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/1504
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-09-13 10:11:53 +02:00
Zheng Bao 645f2dd5d9 nvramtool: Set build flags for FreeBSD
Set HOSTCFLAGS as nil to make the nvramtool include the regex.h
in system. Otherwise it will include the regex.h in kconfig, which
will cause building error in FreeBSD.

Change-Id: I95292e23e1716da1260842be9597119a4e26c8ed
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1500
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Tested-by: build bot (Jenkins)
2012-09-11 10:29:19 +02:00
Zheng Bao 534e61c4e6 nvramtool: Remove the building warning on older gcc
Some older gcc requires the default entry in switch, otherwise
build warning "enumeration value not handled in switch" will come
up.

Change-Id: Ic8ea9960e4aca599e0ea62ec345122c9df57e766
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1501
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-09-11 08:32:30 +02:00
Stefan Tauner e54995a116 superiotool: Add support for Fintek F81865F/F-I register dump.
Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf

The code was done by Juha Tuomala <Juha.Tuomala@iki.fi> but he refused
to sign it off, or commit it for review. I'll commit it anyway with my sign-off
because it does not exceed threshold of originality for any copyright.

Change-Id: Id86267f5add539b99229f20bbe339bfb5eb20f8b
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/1496
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-09-06 19:51:05 +02:00
Zheng Bao a5de94128b gitconfig: Match the Change-Id line more exactly
Change-Id: I5ac267770bc5b43dd1435e75ab0fcbde0d88b664
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1487
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Tested-by: build bot (Jenkins)
2012-08-27 15:41:33 +02:00
zbao 79b0574698 crossgcc: Update GDB patch version to 7.4.1
libgen.h dont have to be included.

Change-Id: I46a6a23a310b20784de956a577f1ab3c7931e34d
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1470
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-08-23 07:02:55 +02:00
Kyösti Mälkki fee73df07a Auto-declare chip_operations
The name is derived directly from the device path.

Change-Id: If2053d14f0e38a5ee0159b47a66d45ff3dff649a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1471
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-08-22 05:06:41 +02:00
zbao 2efabba468 buildgcc: Remove the warning options unsupported by cygwin
My cygwin hostcc doesn't support
-Wempty-body -Waddress -Wmissing-field-initializers

Change-Id: I879e05f3bd396b36b327f204252e820552b6e12e
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1426
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-08-15 08:09:58 +02:00
zbao 844e01357b buildgcc: Update the toolchain patches version
acpica 20120420, acpica-unix-20110922_no_unused_variables.patch is not
used anymore.
binutils 2.22.

Change-Id: I58459bd2eba2ad752fc033e51ee0892e2e069a02
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1424
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-08-14 15:44:20 +02:00
Stefan Reinauer a675d49408 Fix SMBIOS generation
Dropping mainboard's chip.h broke execution of the mainboard's enable
function and the addition of mainboard specific smbios tables.

The former was fixed by Kyosti in http://review.coreboot.org/1374
This patch fixes the breakage in static.c and also backs out a small
portion of Kyosti's patch (because it's not needed anymore)

Change-Id: I6fdea9cbb8c6041663bd36f68f1cae4b435c1f9b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1421
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-08-08 11:34:57 +02:00
Stefan Reinauer 57879c9bd1 Make the device tree available in the rom stage
We thought about two ways to do this change. The way we decided to try
was to
1. drop all ops from devices in romstage
2. constify all devices in romstage (make them read-only) so we can
   compile static.c into romstage
3. the device tree "devices" can be used to read configuration from
   the device tree (and nothing else, really)
4. the device tree devices are accessed through struct device * in
   romstage only. device_t stays the typedef to int in romstage
5. Use the same static.c file in ramstage and romstage

We declare structs as follows:
ROMSTAGE_CONST struct bus dev_root_links[];
ROMSTAGE_CONST is const in romstage and empty in ramstage; This
forces all of the device tree into the text area.

So a struct looks like this:
static ROMSTAGE_CONST struct device _dev21 = {
 #ifndef __PRE_RAM__
        .ops = 0,
 #endif
        .bus = &_dev7_links[0],
        .path = {.type=DEVICE_PATH_PCI,{.pci={ .devfn = PCI_DEVFN(0x1c,3)}}},
        .enabled = 0,
        .on_mainboard = 1,
        .subsystem_vendor = 0x1ae0,
        .subsystem_device = 0xc000,
        .link_list = NULL,
        .sibling = &_dev22,
 #ifndef __PRE_RAM__
        .chip_ops = &southbridge_intel_bd82x6x_ops,
 #endif
        .chip_info = &southbridge_intel_bd82x6x_info_10,
        .next=&_dev22
};

Change-Id: I722454d8d3c40baf7df989f5a6891f6ba7db5727
Signed-off-by: Ronald G. Minnich <rminnich@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1398
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-08-04 18:05:39 +02:00
Stefan Reinauer 188e3c2ff0 Drop mainboard chip.h
mainboard_config never worked right, at least not since we've had sconfig.
Hence, drop mainboard/<vendor>/<device>/chip.h and fix up the mainboards that
tried to use it anyways.

Change-Id: I7cd403ea188d8a9fd4c1ad15479fa88e02ab8e83
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1359
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-07-26 22:57:35 +02:00
Stefan Reinauer a9f670a760 ifdtool: Use perror for file write errors
The "Error while writing." error messages did not output a new line
which made the output look weird. With this patch, it should look like
this:

$ ifdtool -x 3rdparty/mainboard/google/parrot/descriptor.bin
File 3rdparty/mainboard/google/parrot/descriptor.bin is 4096 bytes
Found Flash Descriptor signature at 0x00000010
Flash Region 0 (Flash Descriptor): 00000000 - 00000fff
Flash Region 1 (BIOS): 00200000 - 007fffff
Error while writing: Bad address
Flash Region 2 (Intel ME): 00001000 - 001fffff
Error while writing: Bad address
Flash Region 3 (GbE): 00fff000 - 00000fff (unused)
Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused)

Change-Id: I784ff72d0673f167dbf0bd10921406abd685ce72
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1299
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-07-24 10:13:33 +02:00
Anton Kochkov 59b36f1026 msrtool: Factor out cpuid() from target probe functions into main()
Almost all probe functions called cpuid(). Those calls are replaced
by a single cpuid() call in main() and a new parameter to the target
probe functions with the cpuid() result.

The vendor_t and struct cpuid_t definitions are moved closer to the
top of msrtool.h and the vendor_t enum is reformatted to simplify
addition of further values.

Change-Id: Icd615636207499cfa46b8b99bf819ef8ca2d97c0
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/1259
Tested-by: build bot (Jenkins)
2012-07-21 17:35:46 +02:00
Anton Kochkov c7fc4422a0 inteltool: Add support for H65 Express chipset
Added few MCH and DMI registers for H65E.
Description of them can be found at
"2nd Generation Intel Core Processors
Family datasheet"

Change-Id: If4fee35bb5a09b04ea0684be9cbd3c1e9084b934
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1258
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-21 16:06:41 +02:00
Patrick Georgi 116327ee06 sconfig: typo fix
eliminate printf format warning.

Change-Id: I51f75a259d28c5de788f57c3d720b76ca638e330
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1248
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-20 13:11:46 +02:00
Mathias Krause 41c229c029 cbfstool: signed vs. unsigned fixes
Use the right data types to fix compiler warnings.

Change-Id: Id23739421ba9e4a35599355fac9a17300ae4bda9
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/1236
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-07-18 00:15:35 +02:00
Mathias Krause 5c581c4d6c cbfstool: provide a prototype for remove_file_from_cbfs
To complement commit e1bb49e (Add a "remove" command to cbfstool) and
fix a compiler warning provide a prototype for remove_file_from_cbfs.

Change-Id: Ied8eac956de5fed3f9d82ce1e911ee1fec52db15
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/1235
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-07-18 00:15:27 +02:00
Mathias Krause d2567c8d92 cbfstool: make endian detection code more robust
Accessing the memory of a char array through a uint32_t pointer breaks
strict-aliasing rules as it dereferences memory with lower alignment
requirements than the type of the pointer requires. It's no problem on
x86 as the architecture is able to handle unaligned memory access but
other architectures are not.

Fix this by doing the test the other way around -- accessing the first
byte of a uint32_t variable though a uint8_t pointer.

Change-Id: Id340b406597014232741c98a4fd0b7c159f164c2
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/1234
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-07-18 00:15:15 +02:00
Patrick Georgi 2b108a4368 sconfig: fix up shipped code
The lex compile wasn't current (or something) and so INTA wasn't lexed
properly.

Change-Id: I5a760430788792f54c4e1e0d419b8dd525079d15
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1226
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-07-13 20:27:28 +02:00
Christian Gmeiner 42b808e889 msrtool: add support for cs5536 LPC_SERIRQ (0x5140004e)
This register is helpful for porting new mainboards based on
cs5536 southbridge.

Change-Id: Iff3adc2c2fbc672c8541096756f95b3322f6ab19
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-on: http://review.coreboot.org/1211
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-13 08:40:14 +02:00
Sven Schnelle 0fa50a1990 MPTAPLE: generate from devicetree.cb
This patch adds support for autogenerating the MPTABLE from
devicetree.cb. This is done by a write_smp_table() declared
weak in mpspec.c. If the mainboard doesn't provide it's own
function, this generic implementation is called.

Syntax in devicetree.cb:

ioapic_irq <APICID> <INTA|INTB|INTC|INTD> <INTPIN>

The ioapic_irq directive can be used in pci and pci_domain
devices. If there's no directive, the autogen code traverses
the tree back to the pci_domain and stops at the first device
which such a directive, and use that information to generate the
entry according to PCI IRQ routing rules.

Change-Id: I4df5b198e8430f939d477c14c798414e398a2027
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1138
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-13 08:38:13 +02:00
Guenter Roeck 21856eec59 superiotool: Dump data registers for Nuvoton chips
Add support to dump all data registers for Nuvoton chips (NCT6775F, NCT6776F,
and NCT6779D). Register contents will be dumped if the -e option is provided on
the command line.

Change-Id: I2b425b48c1f28a10ff3c1ca1d7f21c501eff74ad
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1150
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-12 08:13:21 +02:00
Guenter Roeck a89da0969e superiotool: Add support for function to dump superio chip data registers
Add new function dump_data() to dump a bank of superio data registers.

Change-Id: I13a58d87c14d319cfcdea1ec1d54c2b110d90f9f
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1149
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-12 08:13:13 +02:00
Guenter Roeck 975ffc2e0f superiotool: Add support for NCT6775F(A/B) and NCT6779D
Change-Id: I66667fcb58f6885460021f4a2024d6ba56b95f11
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1148
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-12 08:10:28 +02:00
Anton Kochkov 54c07a675b msrtool: Add Intel Nehalem CPUs support
Added Intel processors based on Nehalem
architecture support, with decoding MSRs.

Change-Id: I576d5eac2542c0b62852bf05e42bc98b134c7eae
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1170
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-07-10 00:57:35 +02:00
Anton Kochkov ffbbecc9ee msrtool: Fix Intel CPUs detection
Added vendor check in sys.c file and fixed models checking
in intel targets files.

Change-Id: I1ce52bbce431dea79e903d6bc7a12e5b9ad061be
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1169
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-07-10 00:56:49 +02:00
Raymond Danks e1e6a91ce0 mkelfimage: pkgdata directory created but never used
Remove superfluous pkg* definitions and installation of a target
directory directory that is never used.

Change-Id: I2addf3f316230cdd428def5889fd3beb7c40f422
Signed-off-by: Raymond Danks <ray.danks@se-eng.com>
Reviewed-on: http://review.coreboot.org/1195
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-07-09 22:18:37 +02:00
Sven Schnelle 56dfc7c684 inteltool: fixup intel 5000 chipset pci ids
Change-Id: I2cd1dac0dd9a5da1000a3ffa3e1c8ee4c5c8ba43
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1175
Tested-by: build bot (Jenkins)
2012-07-06 16:40:46 +02:00
Guenter Roeck 3397ceff7b superiotool: Add support for git-based version number
The superiotool Makefile extracts a version string from SVN. This does not work
with a git repository, and results in an empty version string. Use the output of
'git describe' as version string instead.

Change-Id: Idf92c02753b28ef5bcdd3b6df4a08d79ae974434
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1151
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-06 10:21:03 +02:00
Sven Schnelle efb479c08b ROMCC: fix unused attribute lookup
commit 57cd1dd296 added this attribute,
but with wrong length, so it actually never matched.

Change-Id: Ibcc7816b5fa895faa66710cc29de38f129be6a2b
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1133
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
Reviewed-by: Mathias Krause <minipli@googlemail.com>
2012-06-22 09:19:37 +02:00
Stefan Reinauer 57cd1dd296 Teach romcc about attribute((unused))
This makes it easier to use the same code on romcc and gcc.
Specifying attribute((unused)) on romcc does nothing.

Change-Id: If9a6900cad12900e499c4b8c91586511eb801987
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1132
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-06-22 03:29:21 +02:00
Sven Schnelle 69eab16ce6 mptable: realign comments with code
Change-Id: I4bc90334c7220512607cd5e777ce1f8cc595e2f0
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1115
Tested-by: build bot (Jenkins)
2012-06-20 12:46:55 +02:00
Sven Schnelle 2f8c4f829e mptable: initialize apic/bus arrays with ARRAY_SIZE
and increase the busses size to 32, as 16 isn't enough one some
systems (i5000 for example)

Change-Id: Ie09f451dd82ac25b0de85fd47807136e01da737b
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1114
Tested-by: build bot (Jenkins)
2012-06-20 12:46:39 +02:00
Sven Schnelle 2fcc166fb8 mptable: pretty print PCI INT entries
make it more readable by adding INT defines and a left shift.

Change-Id: I7db4d8c71ab4d705833019aa4cc2f11cef7d4fee
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1113
Tested-by: build bot (Jenkins)
2012-06-20 12:46:28 +02:00
Sven Schnelle 4fbcaecf9a mptable: Fix BUS type determination
Change-Id: I7268b35671f6629601fa3b2a589054b8c5da5d78
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1112
Tested-by: build bot (Jenkins)
2012-06-20 11:07:51 +02:00
Sven Schnelle b00c9a2257 mptable: reindent code to comply with coreboot coding style
Change-Id: Iee27c535f56ebedaceea542c2919cde68006827c
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1111
Tested-by: build bot (Jenkins)
2012-06-20 10:36:33 +02:00
Sven Schnelle 09a180230a mptable: Fix 'mptable.c:1019:12: warning: ‘c’ may be used uninitialized in this function'
Change-Id: Icf6968f5bcbbe28c3a2a1d6ee7c1fd0be583f182
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1110
Tested-by: build bot (Jenkins)
2012-06-20 10:20:48 +02:00
Sven Schnelle 57f524fd62 mptable: remove unused variable
Change-Id: I1ff7e040b5aafcdb05a3669158ae94551981e747
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1109
Tested-by: build bot (Jenkins)
2012-06-20 09:44:18 +02:00
Sven Schnelle 9b860165ba mptable: print ioapic entries
Print IOAPIC entry based on actual data, instead of giving the user
the feeling that the generated ioapic entry has any relation to reality.
If the IOAPIC entry in the MPTABLE is incorrect, the user will notice
it anyways. But adding a static entry (which might be also incorrect)
is even worse.

Change-Id: I6d0012324a9e6c7d22436ada36cbd3a4f7166f5c
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1108
Tested-by: build bot (Jenkins)
2012-06-20 09:43:43 +02:00
Sven Schnelle 0b879f838f mptable: rename LAPIC_ADDR to LOCAL_APIC_ADDR
It was renamed in coreboot, so have mptable generate correct code.

Change-Id: I9579209f9f47b756d8ccab63b6f942d22d53d79d
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1107
Tested-by: build bot (Jenkins)
2012-06-20 09:38:01 +02:00
Raymond Danks c95da25ac6 Improve parsing of --cpu parameter in abuild script.
* -c "" need never be tested if getopt params are handled; fail abuild script when getopt parsing fails
* use expr to resolve numeric test fails with -c max
* cpus variable may be being passed in the environment.  Don't overwrite MAKEFLAGS if it is not.

Change-Id: I96236ef719a1a9f942b8e15bfcf015d60068e58a
Signed-off-by: Raymond Danks <ray.danks@se-eng.com>
Reviewed-on: http://review.coreboot.org/1068
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-04 16:19:45 +02:00
Patrick Georgi 2dbfcb750f sconfig: Some fixes
clang complained about a missing include and wrong fprintf use.

Change-Id: Idc023b653e694147c624d5f8f9ed3b797c462e9f
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1067
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-05-30 19:43:01 +02:00
Stefan Reinauer 9981cad801 nvramtool: use C99 PRIx64 / PRId64 for uint64_t variables
In printf/printk, using %lld or %ld for uint64_t will warn on either
64bit or 32bit machines.  However, C99 defines PRIx64 / PRId64 to
provide the right modifiers for printing uint64_t variables. Use them
instead.

Change-Id: I68df5d069a1e99d1a75885173ddfd7815197afea
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1053
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-05-25 08:01:37 +02:00
Stefan Reinauer 1b1309f289 Add EM100 mode to Intel Firmware Descriptor tool
To avoid having two copies for every firmware descriptor (one for
EM100 use and one for real SPI flash use), add an EM100 mode to
ifdtool that allows to "dumb down" a fast image to the settings
required for the EM100 to work.

Change-Id: I0ed989f0a49316bc63d8627cb5d4bd988ae7a103
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1039
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-24 22:22:24 +02:00
Stefan Reinauer 89ba15a0c1 chromeos: Fix compilation of coreboot-utils package
The ChromeOS build system provides a set of CXXFLAGS, however those do
not contain -DCOMPACT. This breaks the compilation of cbfstool in
coreboot-utils.

This fix overrides CXXFLAGS so that coreboot-utils compiles again.

Change-Id: If9495bdd815fe2cdaeba5386afa953558742467b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1038
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-24 22:22:12 +02:00
Patrick Georgi 92ff934e0b abuild: Disable abuild-level parallelism for now
It still failed because make touches files it isn't
supposed to touch.

Change-Id: I5a6ceaa9d5da212c1e34b121cf39fa9d27964747
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1037
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-05-24 18:09:17 +02:00
Patrick Georgi 5fb2b5cdac crossgcc: Test for m4 and bison
Happened way too often that crossgcc failed
because m4 or bison wasn't installed already.

Change-Id: Ibcca2183edd5db20608015e3898f8fff9a6d11e8
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1026
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-14 18:33:41 +02:00
Patrick Georgi 6e61ad347c crossgcc: update sources
Update GNU project versions, download GNU project tarballs
using ftpmirror.gnu.org (http, picking close servers).

Update ACPICA tarballs, ignore https certificates for all
downloads. Not very useful, but breaks ACPICA download.

Change-Id: I4aa8b08836346d031793a006b20b741d86e48988
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1025
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Raymond Danks <ray.danks@se-eng.com>
2012-05-14 18:33:35 +02:00
Patrick Georgi 64d9a7784e abuild: Move configuration handling together
Handling user options was spread out across the code.
Collect as much as possible in the getopt loop.

Change-Id: I4979a14988da000c008e155023b960535b529b41
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1028
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-14 18:33:26 +02:00
Patrick Georgi 2ea8e86856 abuild: Remove abuild.info hack
abuild used to allow boards to override certain environment
variables using a file called abuild.info.
This isn't used, this isn't needed. Drop it.

Change-Id: Ic93748f602bf0c354ff1f3be25a050e1cb469256
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1027
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-14 18:33:20 +02:00
Patrick Georgi 43105d6a5a abuild: Build boards in parallel if possible
Determine if xargs -P works. If yes, use that to build multiple
boards in parallel, instead of relying on make -j X, when doing
a full abuild run (instead of single boards).

make -j X isn't able to make use of several cores at various
serialization points in our build process, so this change results
in a >25% speed up for a full abuild run in my tests.

Change-Id: Id484a4211c84a3a24115278e0fbe92345f346596
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/409
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-05-10 22:11:16 +02:00
Stefan Reinauer 564e90f571 Add a tool to work on i915 hardware in user mode
This is the beginning of a tool that transforms the i9x5 code to user
mode code. Consider this a very early stage although it does produce
two programs. Requires spatch 1.0 or greater.

To try it out, assuming you have an up-to-date spatch,
   sh transform
   make
   make broken

Please don't fall to the temptation to auto-magicize this process.
It's primitive for a reason. That said, suggestions welcome of course.

Change-Id: I0188e36637b198b06c17f6d3c714d990e88bd57d
Signed-off-by: Ronald G. Minnich <rminnich@chromium.org>
Reviewed-on: http://review.coreboot.org/1003
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-08 00:40:36 +02:00
Patrick Georgi 44a89b34f8 Fix build with CMOS support on various platforms
When bringing in nvramtool as build_opt_tbl replacement,
various platforms where left in the cold that don't
provide direct IO support from userland (or at least not
in a way we support).

Build nvramtool without CMOS support when done as part of
a coreboot build. We don't need to touch CMOS in this case.

Change-Id: Icc88d1d32f10384867a5d44b065f9aa119bb0d50
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/983
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-05-08 00:40:01 +02:00
Patrick Georgi e204e2ae87 lint: Avoid downloading blobs repository
The stable lint test "build-dir-handling" ran the build system
in a way that made it download the blobs repository. Since this
is part of the pre-commit hook, this might have kicked in with
users desiring not to have them.

Change-Id: I44a00137352c5966ff7fe2a030673276f6803908
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/999
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-04 01:54:02 +02:00
Patrick Georgi bea8421145 abuild: Add option to use binary files
abuild -B enables the use of the blob repository.

Change-Id: I2dd823d3b024ad249d72d668657bf6a6e92145cf
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/958
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-05-01 00:28:01 +02:00
Raymond Danks a293714579 nvramtool: Allow build under Cygwin
To build under Cygwin, nvramtool depends upon the package ioperm:
http://openwince.sourceforge.net/ioperm/

for sys/io.h and sys/perm.h.  This change causes the nvramtool make to correctly include and link against these headers and libraries.

Change-Id: If6cd9d324de7bc19830e0018844f42761b28ddd3
Signed-off-by: Raymond Danks <ray.danks@se-eng.com>
Reviewed-on: http://review.coreboot.org/940
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-29 18:27:30 +02:00
Raymond Danks 51b8f05ab3 ectool: Allow build under Cygwin
To build under Cygwin, ectool depends upon the package ioperm:
http://openwince.sourceforge.net/ioperm/

for sys/io.h and sys/perm.h.  This change causes the ectool make to correctly include and link against these headers and libraries.

Change-Id: I7d54ab5110c2bb1fd21dfa48d56031f3f29cd54e
Signed-off-by: Raymond Danks <ray.danks@se-eng.com>
Reviewed-on: http://review.coreboot.org/941
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-28 02:46:54 +02:00
Patrick Georgi 770c44d20f Drop build_opt_tbl
It's gone from the build. Drop the code as well.

Change-Id: Ice6fcb39565273360a576bda4826f16088f4666c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/914
Tested-by: build bot (Jenkins)
Reviewed-by: Vikram Narayanan <vikram186@gmail.com>
2012-04-22 10:23:48 +02:00
Vikram Narayanan a8111cf980 nvramtool: Unify nvramtool and build_opt_tbl
As cmos.layout parsing capabilities are already there in nvramtool,
use those than using build_opt_tbl.c. Add binary and header file
generation in nvramtool. Make appropriate changes to Makefile.inc.

Change-Id: Iaf3f5d4f51451aeb33c92800a0c895045f2388cf
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Reviewed-on: http://review.coreboot.org/898
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-04-21 09:36:24 +02:00
Patrick Georgi c3fc4b9337 nvramtool: Allow spaces in enumeration names
Change-Id: Id526e74f06fb15d4692d7b6edc8b5863f2d42c50
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/901
Tested-by: build bot (Jenkins)
2012-04-21 09:35:10 +02:00
Patrick Georgi 210fa302a3 lint: tighten whitespace check some more
Don't test executable files nor object files, even if the former might
render the test useless on win32 (executable bit isn't well defined there).

Change-Id: Ifb6fc83243289d266f439316c14b6b009f8da5fc
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/890
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-04-17 21:40:45 +02:00
Uwe Hermann 6113c1c738 kconfig: Fix 'make gconfig'.
Change-Id: Id2d0735d875b40e131fc2aada27435fdcbacc8cb
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://review.coreboot.org/891
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-04-13 10:51:40 +02:00
Mathias Krause 941158fb70 cbfstool: pretty print cmos layout files
While at it, also make the array static - no need to export this symbol.

Change-Id: I7fdcda2b80150b6f32b5bc3e0957998a4fd43fce
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/892
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-04-12 22:14:20 +02:00
Vikram Narayanan f42c377fed hexdump: fix compiler warning
Fixed "warning: format not a string literal and no format arguments"

Change-Id: If752a37f268c90f782c6e831e5477ea804e48026
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Reviewed-on: http://review.coreboot.org/878
Tested-by: build bot (Jenkins)
Reviewed-by: Bernhard Urban <lewurm@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-04-07 19:57:42 +02:00
Patrick Georgi 4dd3853437 Ignore .exe files in whitespace test
On windows, we sometimes require getopt executables, which end up
in the source tree. These shouldn't break the whitespace test.

Change-Id: Iaf86e38b94605bebb69a317e00f932eefcf468b9
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/863
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-05 20:50:52 +02:00
Patrick Georgi 92cfe183a7 Add getopt implementation to abuild
Similar to buildgcc, abuild requires getopt(1). Provide an
implementation for platforms without it (Win32)

Change-Id: I2ae4d84e06dd34135c97b18819da2b49a89706ce
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/862
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-05 20:50:46 +02:00
Patrick Georgi 4a2daf6a99 nvramtool: 64bit safe CBFS handling
Change-Id: I4f23ee04cd6479e55e9467af1b0196936412deb1
Signed-off-by: Patrick Georgi <Patrick.Georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/846
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-04-03 18:33:47 +02:00
Patrick Georgi 499fc926f8 Add nvramtool to coreboot build system
This way we can depend on it during build.

Change-Id: I7e773c6a029e376e3d70d0a8c9e96ffe0c2cf82e
Signed-off-by: Patrick Georgi <Patrick.Georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/845
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-04-03 18:32:23 +02:00
Vadim Bendebury c302d20ed3 Force coreboot mconf to create temp files in the output directory
This change partially addresses the problem with attempting to
generate coreboot image out of tree. The configuration step fails when
in cheroot, if the destination directory is placed in /tmp.

The problem is that the mconf package tries renaming the temporary
file created in the local directory into the destination config file.
If the destination root and the local directory are located on
different file systems, the rename operation fails.

The proper fix (still upcoming) would be to identify all places where
mconf creates temp files, and make sure that all temp files get
created in the destination tree.

This change modifies just one location, which prevents building out of
tree in the most common case.

Test:
  run the following in the coreboot directory in chroot:
    (coreboot) cp config.lumpy .config
    (coreboot) /bin/rm -rf /tmp/cb
    (coreboot) CROSS_COMPILE=i686-pc-linux-gnu- make obj=/tmp/cb oldconfig
    (coreboot) CROSS_COMPILE=i686-pc-linux-gnu- make obj=/tmp/cb

  Observe the build succeed (it was failing during the config phase
  before this change)

Change-Id: If4506e984b8afc192a1689c7b0aa956dd35f66c6
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/815
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-02 18:39:22 +02:00
Gabe Black e1bb49e2ec Add a "remove" command to cbfstool
This command removes the first file it finds with the given name by changing
its type to CBFS_COMPONENT_NULL and setting the first character of its name to
a null terminator. If the "files" immediately before or after the target file
are already marked as empty, they're all merged together into one large file.

Change-Id: Idc6b2a4c355c3f039c2ccae81866e3ed6035539b
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: http://review.coreboot.org/814
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-02 18:39:08 +02:00
Marc Jones 087b24db2d Update xcompile to search for x86_64 toolchain.
This adds detection of x86_64 gcc toolchain (which buildgcc can build
if provided the option).

Change-Id: I8b12f3e705157741279c7347f4847fb50ccc2b0e
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/673
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Tested-by: build bot (Jenkins)
2012-03-31 12:49:45 +02:00
Stefan Reinauer cbb648c001 Enable -Werror for romcc
... and remove some dead code.

Change-Id: Id959bdf57af09db2a1f5742555c2dcabca38ac9a
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/818
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-03-31 12:07:10 +02:00
Stefan Reinauer a7b296d450 Fix warnings in coreboot utilities.
- Fix some poor programming practice (breaks of strict aliasing as well
  as not checking the return value of read)
- Use PRIx64 instead of %llx to prevent compilation warnings with both
  32bit and 64bit compilers
- Use same compiler command options when linking inteltool and when
  detecting libpci for inteltool

Change-Id: I08b2e8d1bbc908f6b1f26d25cb3a4b03d818e124
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/752
Tested-by: build bot (Jenkins)
Reviewed-by: Mathias Krause <minipli@googlemail.com>
2012-03-30 20:26:50 +02:00
Vadim Bendebury bb1177e16e Allow components smaller than declared size.
idftool was failing to add the ME blobs into the output image in case
the blob size does not exactly match the size allocated for it in the
flashrom structure.

It is difficult to set the field in the structure to exactly match the
size (for some reason Intel flash tool fails to insert the correct
size even when given the exact ME blob). On the other hand there is no
harm in using am ME blob smaller than the allocated size, this change
modifies the tool building the image to allow for smaller components.

Change-Id: I1b04f90051b91157391943c9bad0eb06dd297431
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/751
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-30 17:48:45 +02:00
Gabe Black 5d3438de41 Revamp cbmem.py to use the coreboot tables.
This change makes significant changes to cbmem.py to make it use the
coreboot tables to find the memory console and timestamp areas instead
of looking for the in memory table TOC structure. That appears to be
more robust and gets cbmem.py working again after some unrelated
changes that affected memory layout.

It also introduces some small infrastructure to make accessing C style
structures in physical memory easier and more transparent.

Change-Id: I51833055a50c2d76423520ba6e059bf8fc50adea
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/762
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-03-30 17:46:26 +02:00
Vadim Bendebury b93f74bb07 Introduce utility for parsing CBMEM contents.
This is a python script which is supposed to run on a target
which is controlled by coreboot. The script examines top of
memory looking for the CBMEM signature at addresses aligned at
128K boundary. Once the script finds the CBMEM, it iterates
through the CBMEM table of contents and parses two entries: the
timestamps and the console log.

This submission is just a template to build upon to create a
utility for displaying CBMEM information while running Linux on
the target.

BUG=chrome-os-partner:4200
TEST=manual

See test description of d81e6b8c8d41f2d6 for test procedure.

Change-Id: Id863a8598eaadc2d20d728f9186843e65cbe6f37
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://gerrit-int.chromium.org/5942
Tested-by: Vadim Bendebury <vbendeb@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/723
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-03-29 20:15:26 +02:00
Patrick Georgi c0ea5436c4 gitconfig: Improve commit-msg hook
There was some corner case where commit-msg failed. Update to
latest upstream version.

Change-Id: I822d6c3f64728de7356401465e00575ac5af8196
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/798
Tested-by: build bot (Jenkins)
Reviewed-by: Bernhard Urban <lewurm@gmail.com>
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2012-03-25 20:20:41 +02:00
Stefan Reinauer d7a75ece85 tell superiotool about the ITE 8772
no dumping yet

Change-Id: I4e687ca816c8d6d1c95255b0abf6a19513e23f86
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/734
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2012-03-10 08:47:06 +01:00
Stefan Reinauer 8ebd11eab9 Fix lint-stable checkin hooks on MacOS X
- wc adds a number of leading spaces which broke cut
- sed can't replace spaces with new lines, so use tr for that.
- make sure directories are created if they're not there.

Change-Id: Ia0db059683abe3d97b0ab6feaece660a1f4e5079
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/774
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2012-03-09 05:29:08 +01:00
Patrick Georgi c5fc7db355 Move C labels to start-of-line
Also mark the corresponding lint test stable.

Change-Id: Ib7c9ed88c5254bf56e68c01cdbd5ab91cd7bfc2f
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/772
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-07 17:48:03 +01:00
Patrick Georgi 533ec00689 lint: test that labels begin at start-of-line
Some attempt at enforcing style

Change-Id: Ibbfb86402ecc57e8db6c3857c8e0193085ed4fc2
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/771
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-07 17:47:38 +01:00
Stefan Reinauer 51f6a20680 correctly mark code segments as code in SELF
In bios_log, find that the first segment of the payload is shown
as code rather than data.

Sample:
       Got a payload
       Loading segment from rom address 0xfff29378
         code (compression=1)
       ...

Change-Id: I82eaad23f08c02f4ed75744affa8835255cf5c17
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/767
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-03-07 14:20:09 +01:00
Patrick Georgi 5ec21580f6 Revert "Use -mno-sse to prevent overzealous gcc optimizations"
AGESA uses SSE intrinsics :-(

This reverts commit 05f4b03fb64999ba373fe61256f358e5371bf8ae

Change-Id: I7c48e07a261eafda2119354d282bd05eac5a14b6
Reviewed-on: http://review.coreboot.org/706
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-03-06 22:45:20 +01:00
Stefan Reinauer ccf28ba9cb Use -mno-sse to prevent overzealous gcc optimizations
The offending part that made coreboot crash with some toolchains
was that gcc emits SSE instructions but coreboot did not enable SSE at
that point.

Since the gain for coreboot using SSE instructions is not measurable,
let's not use SSE instructions rather than enabling SSE early on.
One rationale behind this is that other parts of coreboot, like the
SMM handler would need fixing because the XMM registers are not saved
on SMM entry. Thus keep it simple.

Change-Id: I14f0942f300085767ece44cec570fb15c761e88d
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/694
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-03-03 09:15:10 +01:00
Patrick Georgi 07408e687c gitconfig: Add lint-stable as pre-commit hook
When configuring the tree with "make gitconfig", a pre-commit hook
is installed that runs the stable lint tests.
If any of these fail, the log is visible (on stdout) and the
commit is aborted.

Change-Id: Ie2a26e87f466c63b24db8dca8827057a18ac7f3e
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/682
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-01 00:04:40 +01:00
Patrick Georgi cb02cb70d8 lint: create two classes of tests, stable and dev
We have tests that pass (and should be enforced soonish) and those
that don't pass yet (and thus shouldn't break the build).

The plan is simple: As soon as a test passes, it's marked stable so
things remain that way.

"make lint" runs all tests,
"make lint-stable" runs only those that shouldn't fail.

Change-Id: Iaa85d71141606d9756e29b37c7a34c2a15e573ac
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/681
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-01 00:04:21 +01:00
Patrick Georgi 9c7467ea63 Fix lint test for build directories
config files are rename()d, which fails across filesystem borders.
So force temporary config files in current directory.

Change-Id: I583c2ab9a822a6f99f838778aa17ffd2d47eaed1
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/680
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-01 00:04:06 +01:00
Patrick Georgi 7be482b002 Drop support for BROKEN marker
We used to support marking boards broken. We don't need that anymore.

Change-Id: I9d21fdf22c9a8e0e69488fc7896f2a81bf629201
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/675
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-01 00:03:34 +01:00
Patrick Georgi 472efa6041 Remove whitespace.
Fix issues reported by new lint test.

Change-Id: I077a829cb4a855cbb3b71b6eb5c66b2068be6def
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/646
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17 19:04:31 +01:00
Patrick Georgi d13e4167a9 lint: Add test for whitespace issues in the code
So far it tests for trailing whitespace.
"Upstream" files (bison/flex's .?_shipped, kconfig, vendorcode) are ignored.

Change-Id: I7af1954d537fd05f06cd210ac130dac87892159b
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/645
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17 19:04:22 +01:00
zbao 93dd07f3d5 Exit building if romstage.bin is larger than size of XIP
When the romstage.bin becomes bigger than the size of XIP, the
cbfstool can not allocate the romstage in the CBFS. But it doesn't
report an error. It will take quite a while to find out the root
cause.

Change-Id: I5be2a46a8b57934f14c5a0d4596f3bec4251e0aa
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/650
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-17 17:45:23 +01:00
Bernhard Urban f31abe31f0 romcc: kill gcc warnings and .gitignore generated files
don't remove calls to `flatten()' and `correct_coalesce_conflicts()',
since they (probably) have side effects.

Change-Id: I78fc4163b3f5f1f5f3c5153f9559c22e11e8344d
Signed-off-by: Bernhard Urban <lewurm@gmail.com>
Reviewed-on: http://review.coreboot.org/605
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-07 22:34:42 +01:00
Vikram Narayanan d2b31bda67 dumpmmcr: Fix compilation warnings in printf
cf., `man 3 printf`

Change-Id: Ib78937a3e1c1eecf884bde0860594cbdb574f1fe
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Reviewed-on: http://review.coreboot.org/582
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: build bot (Jenkins)
2012-01-26 09:57:56 +01:00
Patrick Georgi ad6331d25f Un-perl commit-msg hook
To simplify installation on mingw a bit (even though git remains a pain),
drop the perl dependency the commit-msg hook introduced to the coreboot
development environment.
It's replaced by awk which we use elsewhere already (and is a more lightweight
utility in any case)

Change-Id: I67adfe1ec43c898735d4bae4819ceb53e83c303b
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/78
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-09 23:55:24 +01:00
Sven Schnelle 4b7b320ff8 inteltool: Add support for dumping AMB registers
Change-Id: I98615725afdb315caa67b2226224e3eb2a0e4393
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/525
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-08 20:41:09 +01:00
Jonathan A. Kollasch cb34bba5df Add missing EOT marker.
Omitted from commit 3d1d6bb4ec

Change-Id: Id3e94d615d50f0673cc5e3fde77ed6748d26ebd3
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Reviewed-on: http://review.coreboot.org/514
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: build bot (Jenkins)
Reviewed-by: Philip Prindeville <pprindeville@gmail.com>
2012-01-03 05:26:16 +01:00
Kyösti Mälkki 472d9025e5 Sconfig: parse Kconfig options from devicetree.cb
Mainboard and chip Kconfig files have several build options that
are redundant with information in devicetree.cb. This patch enables
sconfig to auto-generate equivalent configuration.

  sconfig -s

Generates mainboard's static.c file, as before.

  sconfig -b

This operation creates mainboard's bootblock init code. By default,
for every chip listed in mainboard/devicetree.cb, if there is a
chip/bootblock.c file, the init function is called.
A mainboard/bootblock.c file can be added to override default
behaviour.

  sconfig -k

This operation generates select -options for component paths.

Change-Id: I808d44af552dbc5e0565d6a0f4f72c7be9f5740e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/472
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24 12:25:12 +01:00
Christian Ruppert 74b659992b Respect linker order
Linking fails when using -Wl,--as-needed and/or esp. when forcing --as-needed
through a compiler specs file.
A proper compile/link command would look like: $(CC) $(CFLAGS) $(LDFLAGS) -o foo
$(OBJS) $(LIBS). So the *FLAGS must be passed *before* the objects while the
libraries/dependencies must be passed *after* the objects.
For more details see: http://www.gentoo.org/proj/en/qa/asneeded.xml

Change-Id: I5a5b05e1cab8a2d88ce56c92d9b2f991ca1ee6c0
Signed-off-by: Christian Ruppert <idl0r@qasl.de>
Reviewed-on: http://review.coreboot.org/494
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-21 16:27:01 +01:00
Patrick Georgi c1a75b13c3 buildgcc: Add option to use ccache
This mimicks abuild: -y enables ccache.

Change-Id: I3ac1f809729af816efbc64f5789ab430e1a6a6b2
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/400
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-09 00:25:44 +01:00
Jonathan A. Kollasch 3d1d6bb4ec superiotool: add detection and dump of Infineon SLB9635 TPM
Change-Id: If94ea5f45135a4b65bdd37532851fa0ba864bb73
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/421
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-07 22:05:21 +01:00
Jonathan A. Kollasch 2d7ab4c559 buildgcc: don't download python and expat if disabled
Change-Id: I18cb1426e935c46ead30c72685829c20d186f9d8
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/423
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-07 22:04:47 +01:00
Patrick Georgi 3fd44c36e5 abuild: Don't try to use files that don't exist
Collecting per-board abuild.xml is bound to fail if there
are no such files.

Change-Id: I6bd6b4389beda51654005e0380f0e52f006642db
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/422
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-07 22:04:21 +01:00
Jonathan A. Kollasch 522e9e9746 Avoid false detection of SMSC FDC37N972 when Infineon TPM is present
Change-Id: Ibfb3af4c5d7675a5d4e27021cbb988c2ce00fd9f
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/420
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-07 18:15:41 +01:00
Patrick Georgi 643c9e892f buildgcc: Explicitely state CC everywhere
This should fix issues with the iasl Makefile on Debian and
prepares ccache support for buildgcc.

Change-Id: Id9e6b2044b159b19bf013ec5c47b60ca1c2f2991
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/399
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-06 18:44:53 +01:00
Patrick Georgi f285e04125 kconfig: Use more collision resistant temporary filenames
kconfig creates reasonably safe filenames for its temporary files
except for two of them.

Change-Id: I6861f55ae2a5311e3fb7919333ce9af1e39ce78b
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/408
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-06 18:25:29 +01:00
Patrick Georgi 3db85f3c1b abuild: Write XML/JUnit files per board
Write them per-board and merge them after everything is done.
This prepares for build parallelization.

Change-Id: Ia4e7ce03473bcf8861fb9ae06e9c1270292401ac
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/407
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-06 18:24:26 +01:00
Patrick Georgi f49f7c8514 abuild: Refactor parallelization support
Use MAKEFLAGS to propagate the parallelization configuration to
the build

Change-Id: If90ed446edd8e6dc679d284ee9db7a24269edd36
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/406
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-06 18:23:33 +01:00
Patrick Georgi 8e26465645 abuild: Avoid race condition when running abuild parallely
By moving the just-created file away, parallel runs of abuild might break.

Change-Id: I03368f00e9b11dad4c80d41279970e28debc7ed5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/405
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-06 18:21:40 +01:00
Patrick Georgi 4ffbe2dbe7 buildgcc: Fix wrapper Makefile
buildgcc moved from building gdb by default (with opt-out) to
gdb being optional. Adapt Makefile so it works again

Change-Id: I663a8c70db4f7b5d07456fb67a223dbb2de2c133
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/417
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-06 18:06:28 +01:00
Florian Zumbiehl d35906173d fix superiotool for NCT6776F
The current code exits config mode of the NCT6776F immediately after
detection, so the register dump shows all 0xffs. This patch adds code to
re-enter config mode for the register dump so that the register contents
can be read.

Change-Id: I4ad0c108b6411a665e31f55dea4b91ca77d1a5f7
Signed-off-by: Florian Zumbiehl <florz@florz.de>
Reviewed-on: http://review.coreboot.org/391
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-03 13:57:46 +01:00
Stefan Reinauer 1200ec5a53 buildgcc: Update coreboot reference toolchain to gcc 4.6.2
In addition:
- drop some unneeded patches
- make the scripting support depend on SKIPPYTHON not SKIPGDB
  so it is possible to build GDB with and without scripting support
- rename the repository checkout version of GCC trunk, not X+1
  so we don't have to change it on every version upgrade.

Change-Id: I1b7d5b8921187c1c1d39b04f20bb715ddba72fe8
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/367
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-02 10:51:02 +01:00
Stefan Reinauer 2c3cd125be Add Python scripting to GDB.
This allows GDB to run Python scripts. The Python build is dependant on the GDB
build flag.

Changes by Stefan Reinauer:
- update to latest buildgcc script
- disable GDB per default
- disable python scripting, if GDB is not enabled
- bump version number to 1.06

Change-Id: Ie7fc8706deec41c804870415d3c79d225c98cd31
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/153
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2011-11-01 23:23:03 +01:00
Stefan Reinauer 5ff7c13e85 remove trailing whitespace
Change-Id: Ib91889a374515d36a2b12b53aeb12b6ea6e22732
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/364
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-01 19:07:45 +01:00
Patrick Georgi 1861ff739c buildgcc: Fix colors for dash
The previous fix broke buildgcc colors on MacOS X.
This uses an encoding that should be more universal.

Change-Id: I31ac6090ffb7c04784cf6566823652f229aebbb5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/361
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-31 15:42:23 +01:00
Patrick Georgi 28f6a43755 crossgcc: Fix colors with dash
Ubuntu (and probably other distros) have dash as /bin/sh, which
doesn't display colors by itself. If /usr/bin/printf is found, it's
used instead of the internal printf to re-enable colors.

Change-Id: I3e6d413cd0c8a46ef91821d8c07e88166de58af4
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/352
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-30 21:58:42 +01:00
Sven Schnelle 54a5aedec6 inteltool: Add Intel i63xx I/O Controller Hub
Change-Id: Iaea7e4d1b206d43661ecb61d2ae517723fb8d008
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/356
Tested-by: build bot (Jenkins)
2011-10-30 13:37:16 +01:00
Stefan Reinauer 9491b4d5f5 Update coreboot cross toolchain to gcc 4.6.1
- Tested on Mac OS X 10.7.1
- Tested on Ubuntu 10.04 LTS (Lucid Lynx)
- Tested on Ubuntu 11.10 (Oneiric Ocelot)

Please test on Windows and other Linux distributions

Change-Id: I132c01293fc0cff0cfb84556a93c0b8de8e57230
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/250
Tested-by: build bot (Jenkins)
Reviewed-by: Sven Schnelle <svens@stackframe.org>
2011-10-30 12:01:08 +01:00
Rudolf Marek 113c349720 Add support for AMD IMC controller.
This patch adds support to dump SIO like interface of AMD Embedded Controller
in the SB7xx and SB8xxx southbridges. Parts of the register interface are
documented in SBxxx RRG BDG.

Change-Id: Ib2ccaa3dfe33cfa8e7cba19d8ab0798286ad2f92
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/343
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-27 22:28:55 +02:00
Stefan Reinauer 5e4e2290b6 Add -Werror to xcompile's testcc
If -Werror is not specified, tests for certain compiler flags
will emit a warning, which makes the build break since we compile
with -Werror.

Change-Id: I7be56530ff9f94e5500bad226c83e47145a808d7
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/336
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-27 10:50:39 +02:00
Stefan Reinauer a1e4824f73 Various fixes to cbfstool.
- add ntohll and htonll (as coreboot parses 64bit fields now)
- use the same byte swapping code across platforms
- detect endianess early
- fix lots of warnings
- Don't override CFLAGS in Makefile

Change-Id: Iaea02ff7a31ab6a95fd47858d0efd9af764a3e5f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/313
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-24 20:29:29 +02:00
Marc Jones 616da1ee7f Allow XGCCPATH to be set on the make command line.
The xgcc toolchain may be moved by the user and passed in on the commandline. Updates the Makefile and the xcompile script.

Change-Id: I05797b2cabce39bdd7868c2515f30d34043fc8cc
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/318
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-23 18:55:27 +02:00
Stefan Reinauer 1c795ad109 Add ifdtool, utility to read / modify Intel Firmware Descriptor images
Change-Id: Ie78b97bf573d238d0dff9a663e774deb1b7dea44
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/272
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-22 10:40:18 +02:00
Stefan Reinauer c31c4de681 nvramtool: Fix CMOS checksum to match coreboot (and /dev/nvram)
Change-Id: I28b0dbad36403a31be83581107f40b3ca1332dcc
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/287
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-22 10:33:26 +02:00
Stefan Reinauer 76c44aeea9 sconfig: check whether component directory actually exists
and add drivers/generic/generic back (empty), since it is used by many
devicetree.cb files.

Without this patch typos in component names in devicetree.cb cause
the component to be silently ignored.

Change-Id: I3cfca2725816f0cd7d72139ae53af815009e8ab4
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/270
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-19 03:31:21 +02:00
Stefan Reinauer fbadc499a6 cbfstool: improve error messages
If a file can't be added by cbfstool, print the type and name of the file
in the error message.

Change-Id: I369d6f5be09ec53ee5beea2cfea65a80407f0ba3
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/271
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-10-17 17:50:22 +02:00
Stefan Reinauer 8d427ece81 Fix romstage creation with gcc 4.6 and CAR targets
newer gcc versions generate ".section .text" instead of just ".text"
in their assembler output. This patch makes sure that we don't end up
with a superfluous ".section" that makes the build fail.

Add -Wno-unused-but-set-variable to CFLAGS if the flag exists.

Change-Id: I7f24c987433cc5886dde2af27498d3331cbda303
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/252
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-13 14:20:12 +02:00
Raymond Danks 62ff00e13f mkelfImage: Use -fno-stack-protector if supported by gcc
Gcc 4.1 comes with an SSP https://wiki.ubuntu.com/GccSsp
This is disabled to work around '__stack_chk_fail' symbol not found failures
http://www.coreboot.org/FAQ/Obsolete#How_do_I_fix_stack_chk_fail_errors.3F

The presence of -fno-stack-protector is tested for automatically by configure.

Change-Id: I28ef158829f5935f985cfd5a5440733685cf479a
Reported-by: Raymond Danks <raymonddanks@gmail.com>
Signed-off-by: Raymond Danks <raymonddanks@gmail.com>
Reviewed-on: http://review.coreboot.org/112
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2011-09-24 12:55:26 +02:00
Mathias Krause 14b67f716d superiotool: Don't compile with -Werror
Older libpci version have headers using 'long long' which isn't allowed
in ANSI C. Since we cannot control the libpci version installed in the
system nor in generall have complete control over system headers, simply
skip using -Werror in our makefile.

Change-Id: Ibc1e57bef033bf4971f4108d078222dcf168d5e3
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/210
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-09-14 07:43:33 +02:00
Mathias Krause 9beb5df3c4 inteltool: fixed 64 bit build
The inline assembly for cpuid() was 32 bit specific. Additionally a
format string referencing a size_t argument wasn't using the %z length
modifier.

Change-Id: Iac4a4d5ca81f9bf67bb7b8772013bf6c289e4301
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/211
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-09-14 07:43:19 +02:00
Mathias Krause 5782fee0e1 inteltool: Fixed building of position independent executables
When building a position independent executable (PIE) EBX is used
internally by the compiler to generate position independent address
references so it cannot be used in the clobber list. Use the already
existing code for the Darwin plattform for that case, too -- it'll
preserve the EBX value.

Change-Id: Ief6d4872b8cd990856a0e8227a88bb228782aced
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/209
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-09-14 07:43:04 +02:00
Peter Stuge 864839a3e8 util/crossgcc: Update gdb to 7.3.1
The previous version is no longer available.

Change-Id: I8126617cfe9addeb4778f002398abbcb4c73d2c7
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/214
Reviewed-by: Marc Jones <marcj303@gmail.com>
Tested-by: build bot (Jenkins)
2011-09-14 01:23:04 +02:00
Ruud Schramp bb41f50244 inteltool: added more device IDs
Change-Id: I6f2272ae4071025e671638e83bade6a96aac658b
Signed-off-by: Ruud Schramp <schramp@holmes.nl>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/185
Tested-by: build bot (Jenkins)
2011-09-12 16:41:20 +02:00
Rudolf Marek 8679e52b96 Add support utils for tracing
Following patch adds a userspace util genprof
which is able to convert the console printed
traces to gmon.out file used by gprof & friends.
The log2dress will replace the adresses in logfile
with a line numbers.

Change-Id: I9f716f3ff2522a24fbc844a1dd5e32ef49b540c5
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/179
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-09-07 01:27:57 +02:00
Peter Stuge 0e8ee81edb buildgcc: Do not download GDB source code if run with --skip-gdb
Change-Id: Ida3680418fdd3136752d51cc19f3e14111c12131
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/175
Tested-by: build bot (Jenkins)
2011-08-29 22:42:24 +02:00
Peter Stuge 09377b7d3f buildgcc: Remove all bashisms, making the script run also on BSD
Use sed instead of ${variable:start:length} and ${#variable}
Use single = in string comparisons
Use `eval echo '$'$variable` instead of ${!variable}
Use > file 2>&1 instead of &> file
Use readlink -f to expand the path of GCC configure

Change-Id: Idc7dfcea3922f55630a6855acdb19e36582708bd
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/165
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2011-08-21 08:47:00 +02:00
Peter Stuge b98dbfb97e buildgcc: Fix typo in check for failed iasl build
Change-Id: I3e90b90e807ae775ac66af160a0f8547dcb3597a
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/164
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-08-21 07:39:57 +02:00
Jonathan A. Kollasch 4b8f779278 crossgcc: invoke buildgcc with bash, instead of relying on #!/bin/bash
Change-Id: I09192e57e2535b2f8f98cabeb755f10c5520c499
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/151
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2011-08-14 08:03:55 +02:00
Jonathan A. Kollasch f44bb4f4c1 buildgcc: improve portability
`cp --remove-destination` isn't as portable as `rm -f` and `cp`.

Change-Id: Ib05bfc121f7a0b467f8104920e14fbd02191585f
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/150
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-08-12 09:24:50 +02:00
Marc Jones 2aac3f6c51 Add iasl to buldgcc and rev the version.
Change-Id: If9144cdf088f16bc3974a1784a442a1fd12ac75b
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/147
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-08-10 01:10:40 +02:00
Patrick Georgi ce37765772 crossgcc: update w32api
crossgcc also needs lzma support as w32api is distributed in .tar.lzma

Change-Id: Ia1938fa30262fe0c8bd655a08f9dc731a02e46ba
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/120
Tested-by: build bot (Jenkins)
2011-07-26 21:10:18 +02:00
Patrick Georgi 68df804282 buildgcc: Break if parts of the toolchain are missing
We test for the presence of a couple of tools and even print an error.
But the tool didn't stop there.

Change-Id: I40dcf7894408ea7b24d5f68c76df4b7541f469bd
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/111
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-07-26 16:35:54 +02:00
Patrick Georgi a71ce0daa6 Fix lint-002-build-dir-handling
That lint test requires some Kconfig defaults and uses allyesconfig
for that. Unfortunately that also draws in ccache and scanbuild support,
which significantly change the behaviour of the toplevel Makefile.
Notably, the ccache support breaks if no ccache is installed.

Change-Id: I17cbb7974be33fc077e5cbd5fb616a5b00a47d97
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/80
Tested-by: build bot (Jenkins)
2011-07-07 16:07:20 +02:00
Patrick Georgi 3b81b9dfef Add local copy of commit-msg hook
To avoid using untrusted network to download code, copy the
relevant file to the repo and adapt "make gitconfig" to copy
from there.

Change-Id: I21f0b58d59250aa5d795cf289267ad93bd8d74db
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/73
Reviewed-by: Uwe Hermann <uwe@hermann-uwe.de>
Tested-by: build bot (Jenkins)
2011-06-30 21:04:22 +02:00
Anton Kochkov 7c634ae8c1 msrtool: added support for Intel CPUs
Change-Id: I05f54471665aa99335a88d097c6de20174f91dc6
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/50
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-28 23:09:08 +02:00
Mark Norman 1866e9ca78 Add SMSC SCH3114 superio register descriptions to superiotool.
This has been tested on a Aaeon PFM-540I RevB PC104 SBC.

Change-Id: Ie02875a1fa2d90d7cc843ce745f727312f7b7aec
Signed-off-by: Mark Norman <mpnorman@gmail.com>
Reviewed-on: http://review.coreboot.org/43
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-23 23:17:37 +02:00
Uwe Hermann c55bcdecf7 superiotool: Cosmetics and coding style fixes.
Change-Id: Iacda2a9e37635d5cffc5004caf588ef3e5e09b5e
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://review.coreboot.org/18
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2011-06-09 21:26:47 +02:00
Peter Stuge cc5dd98c1b util/crossgcc: Add build-without-gdb Makefile target
Change-Id: I5d02f1a23e54aa67be0cc01d921898c28c22f8e4
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/16
Tested-by: build bot (Jenkins)
Reviewed-by: Marshall Buschman <mbuschman@lucidmachines.com>
2011-06-09 06:09:17 +02:00
Peter Stuge ceacd77356 util/crossgcc: Add buildgcc -G and --skip-gdb options
Change-Id: Ic31130774ad56abf0b5498b04b4890348352a621
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/15
Tested-by: build bot (Jenkins)
Reviewed-by: Marshall Buschman <mbuschman@lucidmachines.com>
2011-06-09 06:09:17 +02:00
Patrick Georgi 140a990a61 Teach abuild to emit JUnit formatted build reports
Jenkins can produce reports from JUnit test cases, so we fake testcases
for each board.

Change-Id: I34d46d15c83f4f04d2228f302eb626b261ac098d
Reviewed-on: http://review.coreboot.org/1
Tested-by: build bot (Jenkins)
Reviewed-by: Sven Schnelle <svens@stackframe.org>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-06-06 17:13:50 +02:00
Patrick Georgi f9d19f2a26 Report build result from abuild (did all requested boards build?)
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-01 19:29:48 +00:00
Stefan Reinauer 2c19f5d333 exclude src/vendorcode from GPLv2 license checks.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-23 17:16:44 +00:00
Patrick Georgi 40ad842ade Add regression test for build directory handling to make lint target
A couple of scenarios that were fixed in the last few revisions are
tested to ensure that it's easy to determine breakage.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-21 22:18:59 +00:00
Cristian Magherusan-Stanciu 0b933d4644 Add crossgcc target to automatically build reference toolchain
This means that a simple:

$ make crossgcc

creates the reference toolchain in the correct directory. Thanks to the
dependency on the clean-for-update target, an existing .xcompile along
with any compiled objects in build/ will be cleaned out, so the next
build will automatically use the newly created reference toolchain.

Signed-off-by: Cristian Magherusan-Stanciu <cristi.magherusan@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6598 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-16 01:35:03 +00:00
Patrick Georgi a8f0f5120b Fix compilation error due to non-unix style line endings in cmos.layout file while generating option_table.h.
Windows, Mac and *nix type line endings are now taken care of.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6563 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-10 21:42:52 +00:00
Stefan Reinauer 3187d0267d Add (partly) support for Nuvoton NCT6776F
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-22 23:12:40 +00:00
Stefan Reinauer 5a4ae82809 cosmetic changes to superiotool's nuvoton code
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-22 23:10:35 +00:00
Jonathan Kollasch 1571dc9637 Cast arguments to ctype(3) functions through (int)(unsigned char).
Signed-Off-By: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-By: Jonathan Kollasch <jakllsch@kollasch.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6519 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-19 19:34:25 +00:00
Stefan Reinauer ebc93def5b Emit unwritten symbols in Kconfig so we don't have to do constructs like
#if defined(CONFIG_FOO) && CONFIG_FOO anymore. This was partially implemented 
but didn't work for symbols that were unset because of a missing dependency.

Patch taken from SeaBIOS.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6511 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-18 02:07:16 +00:00
Ruud Schramp 18b02360b9 Add detection/dump support for ServerEngines SE-SM 4210-P01.
Note that the registers and their defaults are mostly based on educated
guessing, due to the lack of datasheet.

Signed-off-by: Ruud Schramp <schramp@holmes.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6484 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-11 07:46:27 +00:00
Stefan Reinauer 61aee5f4b1 In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.
http://www.coreboot.org/pipermail/coreboot/2007-September/024665.html

It's about time we follow this advice.

Also move some manually set __PRE_RAM__ defines (ap_romstage.c) to the Makefile and
drop unused CPP define

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6482 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-10 04:15:23 +00:00
Prakash Punnoor 3af120fd2b Revert r6460, add full W83627DHG-P/-PT support instead.
Add support for detecting/dumping the registers of Nuvoton W83627DHG-P/-PT.
This is a different chip than the Winbond W83627DHG (different IDs).

Signed-off-by: Prakash Punnoor <prakash@punnoor.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6468 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-29 12:02:03 +00:00
Prakash Punnoor fde7025b61 I noticed some registers of Winbond W83627DHG, which the datasheet mentions, were not dumped by superiotool. This patch adds those registers to the dump.
Signed-off-by: Prakash Punnoor <prakash@punnoor.de>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6460 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-25 16:54:38 +00:00
Stefan Reinauer 4cf7879cf0 oops, one URL fix was missing. Add new DirectHW URL
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6455 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-18 22:53:38 +00:00
Stefan Reinauer cff573d3a4 DirectHW fixes for coreboot utilities
See http://www.coreboot.org/DirectHW for more information

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-18 22:08:39 +00:00
Stefan Reinauer 9018b6ee64 msrtool: Update to use DirectHW on Mac OS X
http://www.coreboot.org/DirectHW

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6443 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-14 09:08:27 +00:00
Mathias Krause 155c379b74 nvramtool: Move code so it has access to the right data structures
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6440 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-10 07:52:02 +00:00
Mathias Krause 943b8b5997 nvramtool: Change precedence order for data sources
nvramtool couldn't handle certain combinations of sources for CMOS
layout and CMOS data. This change allows for nearly all combinations.

Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-08 12:58:16 +00:00
Michael Karcher 5fb8fc093f Add support for the NSC PC87364 Super I/O.
superiotool -deV output:
http://www.flashrom.org/pipermail/flashrom/2011-March/005878.html

Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6433 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-06 17:58:31 +00:00
Sylvain "ythier" Hitier 5325a48340 [SCONFIG] remove unused variable in inherit_subsystem_ids()
i is a leftover from debugging, no longer needed. So just remove it.

Signed-off-by: Sylvain "ythier" Hitier <sylvain.hitier@gmail.com>
Acked-by: Sven Schnelle <svens@stackframe.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6424 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 21:57:11 +00:00
Sven Schnelle 750edfd88c Add lex output
lex.yy.c_shipped wasn't committed in r6420, which breaks the build
if you don't have the expert option checked that rebuilds those files.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 21:43:57 +00:00
Sven Schnelle 270a908646 Add subsystemid option to sconfig
Allow user to add 'subsystemid <vendor> <device> [inherit]' to devicetree.cb for
PCI and PCI domain devices.

Example:

	device pci 00.0 on
	       subsystemid dead beef
	end

If the user wants to have this ID inherited to all subdevices/functions,
he can add 'inherit', like in the following example:

	device pci 00.0 on
	       subsystemid dead beef inherit
	end

If the user don't want to inherit a Subsystem for a single device, he can
specify 'subsystemid 0 0' on this particular device.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 19:58:15 +00:00
David Hendricks b159f7ab37 add mec1308 support to superiotool
This patch also disables FDC37M81x since it has a conflicting device ID
and is not supported very well anyway.

Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Stefan Reinauer <reinauer@google.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-17 00:52:02 +00:00
jakllsch b0c94a1866 Add NetBSD support to nvramtool.
Signed-off-by: <jakllsch@kollasch.net>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-08 16:07:49 +00:00
Christian Ruppert 7c2eec00a2 Add support for the IT8720F Super I/O
Signed-off-by: Christian Ruppert <idl0r@gentoo.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-03 16:00:28 +00:00
Sven Schnelle ed61c4ad7e Add detection/dump support for the NSC PC87382.
It is a rather small 'Super I/O' device, containing a serial port, IR,
GPIO, and a Docking LPC switch. It is used in various Thinkpads.

Add 0x164e/0x16ef to the list of probed ports for NSC chips, as
Thinkpads are using this address pair.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-02 23:49:41 +00:00
Mathias Krause 478b77d388 Fix using custom build configs in abuild
The undocumented config argument for the -t option implicitly assumes
the config file is within the mainboard directory but fails to honor
this assumption when it comes to copying the file.

Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-01 10:42:52 +00:00
Patrick Georgi 36ade67007 Separate CMOS layout from lbtable handling
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6314 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-28 07:56:39 +00:00
Patrick Georgi 1e916e0766 Move CMOS handling into separate files in accessors
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-28 07:54:11 +00:00
Patrick Georgi 49a74437aa Move the parser for cmos.layout text files to accessors
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-28 07:50:33 +00:00
Patrick Georgi c6d2b09f76 Move CLI portion of nvramtool into cli/ subdirectory as first step towards librarization.
Also: update one regex wrapper user.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6310 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-28 07:47:10 +00:00
Patrick Georgi c7ca3e5ca4 Eliminate a couple of 3-line functions that barely wrap *printf calls
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6309 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-28 07:41:10 +00:00
Patrick Georgi bf64985e3b No need to add varargs magic to a simple regex wrapper.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6308 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-28 07:40:08 +00:00
Stefan Reinauer a595058197 If the tool has 64bit issues, we need to find and fix them. No papering over them.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6296 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-24 21:27:22 +00:00
Rudolf Marek 6e29665309 Add CFLAGS when compiling resulting executable. It broke 64bit systems, because the rest uses -m32 now.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6294 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-24 21:05:53 +00:00
Patrick Georgi 202be7b6b7 Add nvramtool -D option that allows taking cmos data from
a plain binary file. Overrides using cmos.default in CBFS
if both -C and -D are given.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6286 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-21 07:29:40 +00:00
Patrick Georgi 269e932340 Add nvramtool -C option that takes a CBFS file as argument.
When using this option, nvramtool looks for a cmos_layout.bin
and cmos.default in the image and uses these for layout information
and CMOS data.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6285 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-21 07:24:08 +00:00
Patrick Georgi 9cd7eba118 Add support for working on in-memory CMOS data (eg.
as loaded from a file).

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6284 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-21 07:19:59 +00:00
Patrick Georgi be5a178de7 Abstract CMOS accesses a bit more in preparation of using
files for CMOS data.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6283 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-21 07:18:20 +00:00
Patrick Georgi 0d4f6536b0 There's another place where nvramtool can look for
the CMOS checksum specification.
When using nvramtool on files (instead of CMOS and runtime firmware)
it's the only place.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6282 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-21 07:04:05 +00:00
Nils Jacobs fb2b584ac4 Add Geode GX2 memmory descriptors.
Add a simple README file.                                                                                              
                                                                                                                       
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>                                                                        
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-19 06:56:33 +00:00
Patrick Georgi 3ad0851d79 Fix fwrite tests.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6270 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-18 14:38:59 +00:00
Patrick Georgi 244793784c Move option table (cmos.layout's binary representation)
to CBFS and adapt coreboot to use it.

Comments by Stefan and Mathias taken into account (except for
the build time failure if the table is missing when it should
exist and the "memory leak" in build_opt_tbl)

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-18 13:56:36 +00:00
Patrick Georgi 024ec852c2 Remove overengineering, part 1/many
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6267 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-18 12:14:08 +00:00
Patrick Georgi 2601697c6f Eliminate strict aliasing related warnings.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-18 12:12:47 +00:00
Peter Stuge 441426b486 cbfstool: When extracting, refer to files in CBFS as file instead of payload
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-17 05:08:32 +00:00
Peter Stuge b347e0d801 cbfstool: Trivial move of newline after commands in usage
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-17 05:02:09 +00:00
Patrick Georgi a865b17eff Allow coreboot to initialize CMOS if checksum is invalid.
If a file "cmos.default", type "cmos default"(0xaa) is in CBFS,
a wrong checksum leads to coreboot rewriting the first 128 bytes
(except for clock data) with the data in cmos.default, then
reboots the system so every component of coreboot works with the
same set of values.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-14 07:40:24 +00:00
Aurelien Guillaume fe7d6b9a4a Add "cbfstool extract" function.
It dumps everything you ask for, but you might not
get what you expect if the file is compressed or
otherwise converted (eg. payloads in SELF format).
(Originally it would only extract "raw" files.
This is a change by me, as filetypes are commonly used
to differentiate raw data files --Patrick)

Signed-off-by: Aurelien Guillaume <aurelien@iwi.me>
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-13 09:09:21 +00:00
Stefan Reinauer 355632bc31 fix compilation of mconf on some systems.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-05 02:10:50 +00:00
Uwe Hermann f9bd9ae9eb Add detection support for the ITE IT8721F.
Tested on hardware by me.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-01 22:05:57 +00:00
Zheng Bao 6d81646314 Add detection of Nuvoton WPCM450.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-31 01:38:45 +00:00
Stefan Reinauer f1939bb29b Per default, use SeaBIOS payload instead of no payload.
Add choice to use stable or master version of seabios repository

Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-30 17:39:50 +00:00
Stefan Reinauer d7ce71d58f superiotool: Don't skip probing on a port if a a chip was detected on another port.
Only skip probing if chip was found on the same port already to avoid
duplicates.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-30 16:57:58 +00:00
Uwe Hermann d43498d1be Various Winbond/Nuvoton W83527HG fixes as per datasheet.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-20 23:40:23 +00:00
Stefan Reinauer bccbbe6b69 The same mechanisms are used for normal and fallback images.
Hence drop the FALLBACK_ prefix

Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6204 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-19 21:20:14 +00:00
Idwer Vollering 312fc96874 inteltool: Model 0xf2x, ICH5, i865 support.
Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
registers on ICH5. Add ICH5 and i865 to the supported chips list.
Enable the dumping of BAR6 on i865.

Sample output:

  Disabling memory access:
  $ sudo setpci -s 6.0 0x04.b=0x0
  
  $ sudo ./inteltool -m | head -n 9
  Intel CPU: Processor Type: 0, Family f, Model 2, Stepping 7
  Intel Northbridge: 8086:2570 (i865)
  Intel Southbridge: 8086:24d0 (ICH5)
  
  ============= MCHBAR ============
  
  Access to BAR6 is currently disabled, attempting to enable.
  Enabled successfully.
  BAR6 = 0xfecf0000 (MEM)

Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-17 22:34:58 +00:00
Stefan Reinauer 5411e718c1 Update reference toolchain due to some inlining bugs in 4.5.1
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6195 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-17 02:32:42 +00:00
Marc Jones f726602984 This was accidently not svn added when the compiler was updated.
Update coreboot crossgcc toolchain, GDB 4.5.1, MPFR 3.0.0, GDB 7.2.                                                         
Add libelf_cv_elf_h_works=no to produce a libelf.h for Cygwin.                                                              
Add GDB patch to handle #pragma pack in the i386-elf gcc target.                                                            
                                                                                                                            
Signed-off-by: Marc Jones <marcj303@gmail.com>                                                                              
Acked-by: Stefan Reinauer <stepan@coreboot.org>                                                                             



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-17 01:27:22 +00:00
Stefan Reinauer 6559f43dd9 add license headers to some trivial files and pc87427.h
Mostly done according to initial file creator.

Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-17 00:13:54 +00:00
Zheng Bao ca466b2fb3 Add dump support for the Winbond/Nuvoton W83527HG.
The datasheet is available on nuvoton's website.
http://www.nuvoton.com/NuvotonMOSS/Community/ProductInfo.aspx?
tp_GUID=cf73485c-9e0a-4218-9bee-89dfe9a7bb87

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-14 02:02:34 +00:00
Zheng Bao cb6c9e0942 Add detection support for the Winbond W83527HG Super I/O.
Running result.
superiotool r6131
Found Winbond W83527HG (id=0xb0, rev=0x73) at 0x2e

The documentation is not available yet.


Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-12 14:40:29 +00:00
Stefan Reinauer e7a30ee166 Don't skip already built targets anymore, because a recent change could have
broken them again. Instead rely on coreboot's dependencies to figure out
what to rebuild.

Signed-off-by: Stefan Reinauer <stepan@coreboot.org> 
Acked-by: Peter Stuge <peter@stuge.se> 
                                                                                


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-11 22:07:07 +00:00
Patrick Georgi 89ec3760a9 Allow user to define location for Kconfig config via
DOTCONFIG make variable (defaults to .config).
Let abuild use that.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-08 19:58:30 +00:00
Stefan Reinauer e55eb97f4a ACPI table dumping wrapper script
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-04 20:50:39 +00:00
Marc Jones 3693266d0d Update coreboot crossgcc toolchain, GCC 4.5.1, MPFR 3.0.0, GDB 7.2.
Add libelf_cv_elf_h_works=no to produce a libelf.h for Cygwin.
Add GDB patch to handle #pragma pack in the i386-elf gcc target.

Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6137 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-03 00:45:56 +00:00
David Hendricks b97030d706 Add Fintek F71889 detection and dump support.
The patch was tested by a user on IRC who had the F71889FG. I
wrote it using documentation from Fintek's website available here:
http://www.fintek.com.tw/files/productfiles/F71889_V0.28P.pdf

This patch also seems to work for the F71889ED, which uses 0x09 and 0x09 for
chip ID bytes 1 & 2. However, I have not been able to find documentation to
verify that the two chips are identical from superiotool's perspective.

Signed-off-by: David Hendricks <dhendrix@google.com>
Signed-off-by: Alec Ari <neotheuser@ymail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-29 11:56:39 +00:00
Tobias Diedrich 3645e61608 - Add support for Intel Pentium III MSRs
- pmbase is on southbridge function 3 on I82371XX

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-27 14:44:19 +00:00
Patrick Georgi 0cda959710 USBDEBUG by default in abuild was committed by mistake and
then left in because USBDEBUG was actively worked on.
This isn't true anymore, so drop it

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-23 07:30:50 +00:00
Patrick Georgi e882630d47 Add test to check for up-to-date GPL license headers to lint.
"make lint" should not stop after first failed test.
Improve "make lint" output.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-19 10:16:43 +00:00
Stefan Reinauer 911e2ac4b2 drop temp file from coreboot tree
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-19 00:29:32 +00:00
Uwe Hermann 17e5266c73 Make lint script executable, otherwise invocation fails.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-18 18:12:09 +00:00
Patrick Georgi 302993fe77 lint tests can now describe what they do (for the benefit of
make lint users)

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-18 15:07:06 +00:00
Patrick Georgi 558362fa34 Set locale to POSIX to avoid problems with invalid 8bit character
sequences.
Increase scanning speed.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-18 14:33:02 +00:00
Patrick Georgi e85e0c7c54 Consensus seems that this is wanted, integrated into the tree somehow.
This isn't hooked up anywhere, so won't affect anything, except for
developers trying to remove configuration #defines.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-12 09:46:30 +00:00
Zheng Bao 0e40e6ba4d Add detection support for the Fintek F81865/F81865-I.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 00:34:12 +00:00
Uwe Hermann f9892166d5 Remove incorrect IOAPIC lines from some mptable.c files.
- via/epia-n/mptable.c
 - intel/eagleheights/mptable.c (commented out anyway)
 - asus/p2b-d/mptable.c
 - asus/p2b-ds/mptable.c

Some files still incorrectly contain some smp_write_ioapic() lines from
the original mptable utility target (Supermicro P4DPE), which has one
IOAPIC in the southbridge (Intel ICH3-S), two IOAPICs contained in
the first P64H2, and two more in the second P64H2, i.e. 5 IOAPICs in total.

However, none of the boards where this chunk of code is present has
multiple IOAPICs (and even if they had, the PCI devices where those are
located would probably be different anyway), so drop the incorrect
mptable.c contents.

Also drop the lines from the mptable utility, so that future mptable.c files
don't incorrectly inherit any of this stuff.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-31 19:37:50 +00:00
Tobias Diedrich b907d321a5 We need to call smp_write_lintsrc() instead of smp_write_intsrc() for
local ints. This is wrong in most coreboot mptables, probably all
generated by util/mptable/mptable.c.

After fixing this now XP can boot in MPS mode on my M2V.

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-26 22:40:16 +00:00
Uwe Hermann 55dc223ccd Factor out common mptable code to mptable_init().
- Drop sig[], oem[], and productid[] fields in all mptable.c files, no
   longer needed. The sig[] is always the same ("PCMP"), the oem[] is
   currently also always the same ("COREBOOT"), and productid is being
   passed into mptable_init() directly as string now.

 - LAPIC_ADDR is passed in as parameter, too. While at the moment it's
   always the same value that is passed in, the LAPIC base address could
   also be relocated theoretically, so keep it as parameter for now.

 - Fix a few productid entries, they were (partially) incorrect:

   - DK8S2 (was "DK8X", copypaste)
   - 939A785GMH (was "MAHOGANY", copypaste)
   - X6DHE-G (was "X6DHE", incomplete board name)
   - H8DME-2 (was "H8DMR", copypaste)
   - H8QME-2+ (was "H8QME", incomplete board name)
   - X6DHE-G2 (was "X6DHE", incomplete board name)
   - X6DHR-iG2 (was "X6DHR-iG", incomplete board name)
   - GA-M57SLI-S4 (was "M57SLI", incomplete board name)
   - KINO-780AM2 (was "KINO", incomplete board name)
   - DL145 G1 (was "DL145G1", small fix as per vendor website)
   - DL145 G3 (was "TREX", wrong board name)
   - DL165 G6 (was "HP DL165 G6", drop vendor)
   - S2912 (was "S2895", copypaste)
   - VT8454c (was "VIA VT8454C", drop vendor, lower-case "c")
   - EPIA-N (was "P4DPE", copypaste)
   - pc2500e (was "PC2500", incorrect name)
   - S1850 (was "S2850", copy-paste)
   - MS-7135 (was "MS7135")
   - MS-9282 (was "MS9282")
   - MS-9185 (was "MS9185")
   - MS-9652 (was "K9ND MS-9652")
   - Ultra 40 (was "ultra40")
   - E326 (was "E325", copypaste)
   - M4A785-M (was "TILAPIA", copypaste)
   - P2B-D (was "ASUS P2B-D", drop vendor)
   - P2B-DS (was "ASUS P2B-DS", drop vendor)

 - Adapt the mptable utility to use mptable_init() too.

Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-25 15:32:07 +00:00
Peter Stuge 11abcc0ae5 Make ectool -i work; add missing break
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-25 02:12:04 +00:00
Uwe Hermann 7015989464 Add small comment about LDN 5 on F71872F/FG / F71806F/FG.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-24 14:19:09 +00:00
Jonathan Kollasch 760498f8ea Fix superiotool build on non-NetBSD x86_64.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-24 14:18:55 +00:00
Jonathan Kollasch 51ac8382dc Provide for I/O space access on NetBSD.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-24 14:10:35 +00:00
Idwer Vollering 3f91d813ef Add inteltool support for FreeBSD.
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by Stefan Reinauer <stepan@coreboot.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5981 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-24 13:50:13 +00:00
Idwer Vollering a4d77dc74d Update superiotool support for FreeBSD, Makefile fixes.
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-24 13:42:32 +00:00
Jonathan Kollasch d74c7748aa Teach superiotool about the registers in a Fintek F71806 (and F71872).
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-24 12:43:41 +00:00
Uwe Hermann 74d1a6e8a1 We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.
As both ioapic.h and acpi.h define a macro named "NMI", rename one
of them (NMI -> NMIType in acpi.h).

Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-12 17:34:08 +00:00
Stefan Reinauer aa8612ee90 fix typo in minilzma.cc, found by Idwer.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5936 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-10 22:05:02 +00:00
Eric W. Biederman a5a776131a mkelfImage: set kernel_alignment so 2.6.31+ work
The kernel initialization code as of boot protocol 2.10 is now reading the
kernel_alignment field.  With the field left unset the kernel attempts to
align things to 4GB which is unlikely to work, so change the alignment to
the kernel's normal value of 16MB so newer kernels processed by mkelfImage
will boot.

Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-05 18:22:00 +00:00
Patrick Georgi d083595350 Remove lib/ramtest.c-include from all CAR boards.
Remove many more .c-includes from i945 based boards.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-05 09:07:10 +00:00
Warren Turkal 0e8f204277 The commandline parsing for abuild doing a couple of buggy things:
* Long options of the form --opt=arg were not having the arg stripped
  off into a another argument in the output. As a result, all long
  options with args had to be written like "--opt arg" on the command
  line to be recognized.
* The --remove option was shifting too many times.

As a bonus, I also added some logic to make "make distclean" cleanup
the default abuild build dir.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 21:14:19 +00:00
Stefan Reinauer 2dd1ded197 minor include cleanups
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 18:48:15 +00:00
Stefan Reinauer 64b26009a1 the utility is called dumpmmcr, not dump_mmcr
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5852 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 15:15:48 +00:00
Stefan Reinauer e079ce31c9 update license header for dumpmmcr utility according to svn history.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 15:04:14 +00:00
Stefan Reinauer 10ec0fed8e - Fix race condition in option_table.h generation by moving the include
statement to those files that actually need it. This significantly 
  reduces the number of dependencies, so it's no longer extremely ugly to
  specify them manually (see the src/pc80/Makefile.inc portion)
- Add double include guards around option_table.h defines
- Also, drop the AMD DBM690T work around for the issue

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 10:40:47 +00:00
Uwe Hermann 8fa90ec274 Cut the crap.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-21 21:16:27 +00:00
Warren Turkal 3cf287dab0 Add support for dumping ACPI registers for i7
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-03 09:36:37 +00:00
Warren Turkal f3d3cedf80 Add support for dumping RCBA registers for i7
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5772 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-03 09:33:50 +00:00
Warren Turkal 5329195e60 Remove some errant spaces
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-03 09:32:17 +00:00
Warren Turkal 3235eea728 Add DMIBAR support for Intel X58 southbridge
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5770 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-03 09:31:13 +00:00
Patrick Georgi ba3b0ebdf8 The current workaround for binutils on mingw (or any non texinfo system) failed.
While we're at it, improve DESTDIR handling

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-03 08:53:06 +00:00
Myles Watson 7f072fe564 Fix abuild to build all boards. Revision 5754 changed the way vendors and
boards were specified in Kconfig, and abuild depended on that.  Since that rev
it has only built qemu.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-02 18:36:29 +00:00
Myles Watson 70679a095a Simplify last_dev_p so that it matches comments.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5763 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-01 21:03:03 +00:00
Warren Turkal a7f2b0e339 Add support for dumping GPIOS on Intel ICH10R. This information comes from the Intel ICH10 Family Datasheet.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5761 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-01 03:40:57 +00:00
Anders Juel Jensen 28e4af5801 Add suport for normal register dumping on ite8510E/TE/G
Signed-off-by: Anders Juel Jensen <andersjjensen@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5728 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-22 19:41:47 +00:00
Anders Juel Jensen 3d0ff918f8 Add another port to find ite8510 on.
Signed-off-by: Anders Juel Jensen <andersjjensen@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-22 19:40:58 +00:00
Anders Juel Jensen 4fd7df9535 Add support for non LDN register/device naming.
Signed-off-by: Anders Juel Jensen <andersjjensen@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-22 19:40:11 +00:00
Anders Juel Jensen 280275dcb5 The LDFLAGS = -lz is needed to compile on slackware.
Clubbering CFLAGS is never a good idea.

Signed-off-by: Anders Juel Jensen <andersjjensen@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5725 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-22 19:39:04 +00:00
Marc Bertens acc3749644 image parsing for getpir
when adding for example build/coreboot_ram as parameter
it looks in the file for the PIRQ table prints it to stdout 
and shows if the checksum is correct. 

getpir works as before without any commandline parameters.

This is very handy for developing a PIRQ table.

Signed-off-by: Marc Bertens <mbertens@xs4all.nl>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5716 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 11:32:21 +00:00
Corey Osgood f366ce05ef Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.
Both are tested and appear to be working, however I'm not 100% clear
on if the NM10 has any other PCI IDs.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 08:33:44 +00:00
Stefan Reinauer e7b7ae23e6 Add support for Fintek F81216D/DG/AD
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 08:24:01 +00:00
Corey Osgood a6f000cbb8 Add support for the Nuvoton NCT5571D. This chip acts nothing like the other
supported Nuvoton chip, but identical to a Winbond, and Nuvoton is a subsidary
of Winbond, so for simplicity's sake I've added it to the Winbond file.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5706 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17 07:14:44 +00:00
Stefan Reinauer 7c1f6b8489 sconfig parser:
- print erroneous string in error message
 - print line numbers starting from 1 instead of 0
 - exit with return code 1 on errors
 - check return values of fopen operations
 - only create output file if input file was parsed without errors

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-16 18:21:56 +00:00
Donald Huang 03e54de648 Superiotool support for the IT8500 embedded controller.
Signed-off-by: Donald Huang <donald.huang@ite.com.tw>
Signed-off-by: Yung-chieh Lo <yjlou@google.com>
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5690 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-10 23:34:51 +00:00
David Hendricks 2ad6d55e38 Some chips do not require enter/exit sequences. This causes them to be
detected and printed multiple times in probe_idregs_* functions where a
simple series of enter --> probe/print --> exit calls are made.

This patch adds a simple check after each set of those calls to make the
functions quit after a chip is found.

Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5689 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-09 23:13:13 +00:00
Stefan Reinauer 9bf7810dac make sconfig parser regeneration menu selectable
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5688 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-09 13:28:18 +00:00
Patrick Georgi 35d346fe2d Fix build error introduced in r5868.
aliased_name was a compatibility hack to match the output of the C rewrite
with the python version's results. It seems that we carried these
useless symbols with us for years, just without any impact good or bad.

By declaring devices static and tightening the screws (-Werror), the
compiler now knows that these declarations are useless - and stops.


Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stefan.reinauer@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5687 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-09 12:58:16 +00:00
Stefan Reinauer df61dd28f6 non-root devices are not supposed to be accessed outside of static.c except by
walking the tree.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5686 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-09 12:02:00 +00:00
Mattias Mattsson 25bf69a6c9 Adds id for ITE IT8707F to superiotool.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-02 02:34:20 +00:00
Björn Busse 2d33dc4096 add i945GSE to inteltool
Signed-off-by: Björn Busse <bj.rn@co-assembler.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5675 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-01 15:33:30 +00:00
Corey Osgood 23d98c768f Add support for the Intel Atom D400/500- and N400-series integrated
northbridge. Also add support for the very similar Q963/965 northbridge.
Tested: 
  D510: confirmed working, with MCHBAR enable code
  Q965: writes to bit 0 to enable MCHBAR access are ignored, all other functions work

Untested:
  D410/D525/N400: should be the same northbridge

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-29 19:25:31 +00:00
David Hendricks e1822d9f24 Superiotool support for Nuvoton WPCE775x/NPCE781x.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5667 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-22 22:56:44 +00:00
Patrick Georgi 7fc9e291d7 Trivial: Improve error reporting of sconfig slightly by reporting the line number.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5665 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-15 15:59:07 +00:00
Edwin Beasant eb50c7d922 Re-integrate "USE_OPTION_TABLE" code.
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-06 21:05:04 +00:00
Anton Kochkov 106f7ffadf Add support to IT85xx series
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5651 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-06-29 21:26:17 +00:00
Anton Kochkov 7e59f769ef Add support to extended EC series
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5650 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-06-29 21:13:20 +00:00
Stefan Reinauer 9bb0438535 fix return value checks of cbfstool's writerom
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5644 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-06-24 13:37:59 +00:00
Joseph Smith e10757ed52 This patch adds inteltool support for i810E and ICH2.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-06-16 22:21:19 +00:00
Myles Watson 1965a23712 Check for NULL before calling device_match()
It matters for multifunction devices who don't have siblings.

The error in the rumba device tree created that situation.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-06-10 04:06:52 +00:00
Myles Watson 894a34715f Same conversion as with resources from static arrays to lists, except
there is no free list.

Converting resource arrays to lists reduced the size of each device
struct from 1092 to 228 bytes.

Converting link arrays to lists reduced the size of each device struct
from 228 to 68 bytes.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-06-09 22:41:35 +00:00
Stefan Reinauer 74cd569821 inteltool: basic poulsbo sch support.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-06-01 10:04:28 +00:00
Stefan Reinauer 1c60c88679 whitespace cleanup inteltool cpu.c
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5598 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-30 12:35:39 +00:00
Anton Kochkov da0b456ad0 Added support to ICH9 chipset family
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-30 12:33:12 +00:00
Myles Watson c25cc11ae3 Use lists instead of arrays for resources in devices to reduce memory usage.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5576 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-21 14:33:48 +00:00
Stefan Reinauer ace2dc3ac1 The AMD Fam10 code breaks with coreboot 4.5.0.
Potentially caused by reordering. Going back to 4.4.4 which is known working on
Fam10 until gcc or the Fam10 code is fixed.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-19 10:01:37 +00:00
Patrick Georgi 5b0280fb14 Fix path for mingw workaround. Trivial.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5570 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-19 07:21:31 +00:00
Stefan Reinauer 5f1ad89020 New buildgcc version.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5568 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-17 11:02:25 +00:00
Stefan Reinauer 119c58910c drop old patches from crossgcc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-17 10:21:10 +00:00
Peter Stuge b1180b42af msrtool: Print hex values using only as many digits as the field needs
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5566 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-17 07:40:20 +00:00