4398d1e5a9
early mtrr for the p6
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-20 19:57:35 +00:00
472e74177c
Fix from SONE!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1221 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-17 22:21:07 +00:00
b56ef07600
for tyan. recover from Eric B's error additions to via code :-)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1220 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-15 20:05:11 +00:00
820dea8a62
more solo fixes...
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1219 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-15 14:20:18 +00:00
3561759620
- Fix the link check so it actually checks for the appropriate maximum link
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-14 04:29:39 +00:00
5a71d1dca7
- Make the directory for config.py to live in
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1217 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-14 03:33:11 +00:00
34323b52e3
- Correct the logic in buildtarget to match the logic in config.g for select which
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directory to build in.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1216 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-14 03:05:04 +00:00
ad1b35a12b
- Minor bugfixes
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-14 02:36:51 +00:00
fb3e1edc00
Carefully select the directory for config.py
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1214 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-13 20:07:42 +00:00
f3f7c9e655
- Move config.py into the appropriate target subdirectory
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1213 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-13 19:48:13 +00:00
02560b5fa2
move equal with hdama code.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-13 11:49:46 +00:00
b68571c139
get solo target building with 1.1.5 sources
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-13 10:04:06 +00:00
1b1c567892
Drop obsolete ldtstop code. enable smbus_write_byte
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1210 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-13 10:01:13 +00:00
abf9faa786
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:30:44 +00:00
85862124fd
cache ram startup
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1208 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:19:22 +00:00
f610d2466c
pre-mem startup
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1207 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:18:56 +00:00
2caf089187
naughty, naughty
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1206 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:17:59 +00:00
fe78c82c40
first cut
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:17:27 +00:00
383f5f6897
get_bus_freq()
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1204 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:17:04 +00:00
97c211e70f
memory turn-on
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1203 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:16:35 +00:00
079d53232b
get pci ops right
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 19:07:39 +00:00
47e64e8bed
missing directive
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 19:06:53 +00:00
83b991afff
- O2, enums, and switch statements work in romcc
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- Support for compiling romcc on non x86 platforms
- new romc options -msse and -mmmx for specifying extra registers to use
- Bug fixes to device the device disable/enable framework and an amd8111 implementation
- Move the link specification to the chip specification instead of the path
- Allow specifying devices with internal bridges.
- Initial via epia support
- Opteron errata fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11 06:20:25 +00:00
080038bfbd
remove SMBUS_MEM_DEVICE_[START|END] traces from code.
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add 8mbit example config for amd solo.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-07 14:56:48 +00:00
198f0ddded
add missing -m32 flag to compile on opteron natively
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-06 15:08:03 +00:00
a84c6f81ef
add smbus_write_byte() function. currently fails in romcc :(
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-06 15:04:41 +00:00
2e90c1daa0
no hardcoded addresses!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:16:19 +00:00
5b3b9aa5de
standard functions
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1195 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:15:48 +00:00
b6a259b0d2
no need for assembly
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:15:10 +00:00
e046fbbb2c
new cpu types
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:14:42 +00:00
be956f096f
size memory
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:13:12 +00:00
ccf4d34bb7
use standard name
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:12:56 +00:00
95ae7c1e5c
pci.S moved into arch/ppc/lib/pci_ops.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1190 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:11:52 +00:00
be84533ed6
getting options right
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1189 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:10:52 +00:00
5ebf4d3431
- Modify the code to C style indenting.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-03 02:53:02 +00:00
fae510cd84
Some timing in here, but we don't set; it breaks.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 23:33:01 +00:00
ee163f3c18
ram size now set from SPD.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1178 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 22:54:43 +00:00
a70483b83b
First SPD code in and working!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 22:48:28 +00:00
cb3f498296
success. It boots as a bproc slave now.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 18:16:07 +00:00
53311091a6
Fixes but config tool still sucks on this.
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Sigh, two passes here we come? DAMMIT!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1175 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 04:16:30 +00:00
6dd6c68507
IRQ setup for EPIA
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 00:08:42 +00:00
e0005ba6d1
fix sizing of PCI IRQ table in the Config.lb (there are only 5 slots)
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But linux still refuses to believe this table. What's odd is this is the identical table used in V1. Damn.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 23:18:14 +00:00
7cf52c979f
fixes for epia.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1172 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 22:25:36 +00:00
14e72218f3
uses statement missing
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 21:14:52 +00:00
6358a4a003
default USE_FALLBACK_IMAGE to 0
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 17:28:48 +00:00
848d336534
vga support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 16:09:23 +00:00
ab1f217161
some quartet memory init updates.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 14:12:57 +00:00
8e05d42bf8
512kflash builds in epia.512kflash
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1167 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 05:43:09 +00:00
08febd8b67
new epia target for 512k: targets/via/epia/Config.512kflash.lb
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buildtarget now takes either a directory, and uses directory/Config.lb, or
takes a file
epia defaults to 256k flash
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1166 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 05:42:31 +00:00
320c6a0102
Fixes to the smbus code. Now for the fun.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 01:45:43 +00:00
Ronald G. Minnich