Commit graph

61 commits

Author SHA1 Message Date
Patrick Georgi
8dc4b933b1 Only handle code as "driver" that actually uses our driver
infrastructure (special linking, data structures, etc)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-23 16:54:20 +00:00
Uwe Hermann
c70e9fc233 Various license header consistency fixes (trivial).
- Consistently use the same wording and formatting for all license headers.

 - Remove useless whitespace, add missing whitespace, fix indentation.

 - Add missing "This file is part of the coreboot project." where needed.

 - Change "(C) Copyright John Doe" to "Copyright (C) John Doe" for consistency.

 - Add some missing "(C)" strings and copyright years where needed.

 - Move random comments and file descriptions out of the license header.
   - Drop incorrect file descriptions completely (e.g. lpc47m10x/Makefile.inc).
 
There should be no changes in _content_ of the license headers, if you spot
such changes that's a bug, please report!

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-15 23:10:19 +00:00
Patrick Georgi
5543c66cca Actually set HAVE_OPTION_TABLES for the boards that need it.
(See last commit)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09 12:32:55 +00:00
Patrick Georgi
2063197a4f Move all the copies of the romstage.inc rule to
src/arch/i386/Makefile.inc

For that to work, I had to:
- Add a CONFIG_ROMCC variable
- Set that variable on all ROMCC boards
- conditionally choose romcc or gcc rule based on that variable
- remove those two rules from all the boards' Makefiles
- switch a couple of boards to HAVE_OPTION_TABLE, as they actually have.

Also remove the duplication of rules with the sole difference of if
they depend on option_table.h or not.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09 12:21:10 +00:00
Patrick Georgi
af97d33ec4 Clean up ACPI:
- unify all iasl related rules into the toplevel Makefile
- build a filesystem standard for ACPI files and use it
- pass ACPI sources through cpp, so constants can be shared
  between C and ACPI more easily
- use cpp's #include instead of ACPI's Include() so cpp gets
  the whole picture

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08 15:46:37 +00:00
Stefan Reinauer
38f147ed3d janitor task: unify and cleanup naming.
cache_as_ram_auto.c and auto.c are both called "romstage.c" now.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08 12:20:50 +00:00
Patrick Georgi
abf2ad716d newconfig is no more.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-07 21:43:48 +00:00
Stefan Reinauer
e37785791a * fix crt0s/ldscripts paths to fix out of tree build.
* fix iasl output directory for i945 boards (patch
  for moving it to the mainboard directory will follow)
* coreboot_table.c: lb_mainboard can be static
* coreboot_table.c: dump memory table in debug and spew mode
* fix a warning in bootblock.c
* don't include arch/i386/init in arch/i386/Makefile.inc
* announce generation of crt0_includes.h
* allow overriding $(obj)
* drop unused src_types from Makefile
* correctly use hostname -s instead of hostname for COMPILE_HOST

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30 09:47:18 +00:00
Patrick Georgi
2b962a3c39 More Kconfig changes to improve match with newconfig:
DIMM_SUPPORT
APIC_ID_OFFSET
ACPI_SSDTX_NUM
IRQ_SLOT_COUNT
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
	(except msi/ms9185)
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
MEM_TRAIN_SEQ
HAVE_ACPI_RESUME

Also remove MMX (kconfig specific) and HAVE_MOVNTI and IOAPIC
(which we deliberately differ in kconfig) from compareboard
report.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 10:50:21 +00:00
Patrick Georgi
29647d97c5 Align several kconfig options to match newconfig:
HT_CHAIN_UNITID_BASE
HT_CHAIN_END_UNITID_BASE
SB_HT_CHAIN_ON_BUS0
SB_HT_CHAIN_UNITID_OFFSET_ONLY
MAX_CPUS
MAX_PHYSICAL_CPUS
ROM_SIZE
TSC_X86RDTSC_CALIBRATE_WITH_TIMER2

Also hook up asus/p2b-ds

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 07:56:01 +00:00
Patrick Georgi
d5663bac2c Move all IOAPIC selection to southbridges, and remove them
from mainboards.
Some adaptations were necessary after the IOAPIC cleanup,
so this should fix the build.

Fix intel/d945gclf build, which was missing some ACPI component.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18 17:30:36 +00:00
Marc Jones
0f0aa15e7e Fix technexion tim5690 build failure - REALMODE option required for x86.c mainboard function to be built.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23 22:16:18 +00:00
Stefan Reinauer
a64f888b27 newconfig compilation failed with
(.text+0x4989): undefined reference to `vgabios_init'

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23 19:46:36 +00:00
Libra Li
c143693c26 Add mainboard x86emu interrupt function support. Add tim5690 VGA BIOS functions: int15 getting LCD panel ID.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23 19:16:47 +00:00
Patrick Georgi
4638c924f0 Make newconfig and kconfig agree on MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE}_ID
Usually, this means adding values to Kconfig, but in a few cases, adding values
to newconfig, too (which doesn't hurt).

Also really hook up tyan/s2850 and tyan/s2875 to kconfig, and have them still
build.

Trivial and stupid kconfig changes, just lots of them.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-27 11:03:20 +00:00
Peter Stuge
d9276e5eab Trivial style changes, replace a few C++ type comments, and some code reuse
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25 08:35:59 +00:00
Libra Li
4e54b4037f This patch is buzzer of TechNexion TIM-5690.
I forgot to svn add the speaker.c and speaker.h.

Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25 08:14:04 +00:00
Libra Li
4cede71767 This patch is buzzer of TechNexion TIM-5690.
Change EARLY_STAGE into __PRE_RAM__.

Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25 07:48:24 +00:00
Libra Li
7a1e81a56f This is a patch to control the DIP switch and digital I/O.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-18 03:47:34 +00:00
Libra Li
031029d4d4 These are post codes for TIM-5690 LED debug message.
Signed-off-by: Libra Li <libra.li@technexion.com>
Added object reference to Config.lb, too and
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-09 11:53:41 +00:00
Myles Watson
d27c08c289 Remove drivers/pci/onboard. The only purpose was for option ROMs, which are
now handled more generically using CBFS.

Simplify the option ROM code in device/pci_rom.c, since there are only two ways
to get a ROM address now (CBFS and the device) and add an exception for qemu.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06 23:42:26 +00:00
Myles Watson
547d48ab01 Remove some white space and comment differences from devicetree.cb and Config.lb
files.

These boards have non-trivial differences:
gigabyte/m57sli
kontron/986lcd-m
dell/s1850
via/epia-m700

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06 17:32:32 +00:00
Uwe Hermann
d63085b20e Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.
Since we have CBFS setting rom_address in board files is no longer 
necessary.

Also, drop vga_rom_address from RS690 completely, it was never used 
in the code.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06 17:11:05 +00:00
Myles Watson
1d6d45e3c9 Split the two usages of __ROMCC__:
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them."
__PRE_RAM__ means "Use simpler versions of functions, and no device tree."

There are probably some places where both are tested, but only one is needed.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06 17:02:51 +00:00
Uwe Hermann
63a8f2a7c2 Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).

This patch adds choices for menuconfig to select the VIDEO_MB value for:

 - Intel 82810
 - Intel 82830
 - VIA CN400
 - VIA CN700

Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.

We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).

As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.

Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 21:42:13 +00:00
Myles Watson
d73c1b5bf1 Define some variables that were not defined. There are a couple left.
Do kbuildall then grep not.defined kbuildall.results/*
The interesting ones were GENERATE_*  I had to put them in twice to make it work
correctly: once outside the menu setting the defaults, and once inside the menu.
Now they show up when they should, and are always defined

Define HAVE_INIT_TIMER to only exclude the three boards that define it to be 0
in newconfig.
Define MEM_TRAIN_SEQ to be an integer and set it correctly.
Remove CAR_FAM10 and just depend on NORTHBRIDGE_AMD_AMDFAM10
MOVNTI is a performance enhancement, and should default to 0 so it doesn't break
boards that forget to define it.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 15:14:07 +00:00
- supermicro/x6dhe_g/auto.c
d1327ce963 Major cleanups of the hard_reset() code and config in coreboot.
- Drop unused "#object reset.o" entries.

 - Use CONFIG_HAVE_HARD_RESET for all "object reset.o" entries.

 - Drop dead/commented code, i.e. useless hard_reset() from:
   - supermicro/x6dhe_g/auto.c
   - supermicro/x6dhe_g2/auto.c
   - supermicro/x6dhe_g2/auto.updated.c
   - supermicro/x6dhr_ig/auto.c
   - supermicro/x6dhr_ig2/auto.c
   - digitallogic/msm586seg/auto.c
   - dell/s1850/auto.c

 - Add "obj-$(CONFIG_HAVE_HARD_RESET) += reset.o" to kconfig files of boards
   that actually have a reset.c file.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24 19:17:24 +00:00
Libra Li
99bc4514c2 The LAN chip-set on the Technexion TIM-5690 is enabled by hardware and
does not need any handling in software.

Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-22 02:54:25 +00:00
Myles Watson
8f74c5878d Remove CONFIG_CPU_AMD_FAM10 & CONFIG_CPU_AMDK8 from mainboards. They should be
selected in sockets, and they aren't used yet.

Add a couple of variables to src/Kconfig for lack of a better place so that
their selects work.
Add select statements according to newconfig for some variables that were
defined but never selected in mainboard configs.

Fix #if CONFIG_VGA==1 -> #if CONFIG_VGA.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4816 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20 16:10:04 +00:00
Uwe Hermann
4e015eb674 Fix all board names in Kconfig as per wiki / vendor website.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4815 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20 13:55:35 +00:00
Myles Watson
04000f4642 Fix AP_CODE_IN_CAR (only selected for two boards), STACK_SIZE, and HEAP_SIZE.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 19:12:49 +00:00
Uwe Hermann
d65509de14 Set default ROM sizes per-board to match the ROM chip that came
with the respective board.

Of course, the user can still override the size in menuconfig.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 17:37:20 +00:00
Libra Li
3e08cb72ff Fix Kconfig for technexion/tim5690.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15 14:23:33 +00:00
Myles Watson
b8e2027be8 Add CONFIG_GENERATE_* for tables so that the user can select which tables not
to build, but by default all the tables that are available are built.

Make PIRQ table build for qemu.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15 13:35:47 +00:00
Libra Li
7d3649a605 This patch support for the Technexion Tim-5690 mainboard.
It's an embedded AMD RS690/SB600 mainboard.

http://www.technexion.com/index.php/tim-5690

Myles added Kconfig support.

Signed-off-by: Libra Li <libra.li@technexion.com>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-13 16:56:58 +00:00
Myles Watson
3fe6b7002b Add const to get rid of some warnings when passing quoted strings.
Remove an unused extern declaration.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-09 20:13:43 +00:00
Patrick Georgi
98402455c5 More kconfig:
AMD LX
AMD SC520
boards by iei, pcengines, technexion, technologic, thomson

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4743 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-08 14:31:56 +00:00
Patrick Georgi
24796fd364 This does away with CONFIG_ROM_PAYLOAD_START and CONFIG_PAYLOAD_SIZE.
Both were only really used in pre-cbfs, as the payload's size isn't
relevant for the build process anymore.

Various calculations in {no,}failovercalculation.lb are adapted
accordingly.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4720 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-04 18:55:40 +00:00
Patrick Georgi
6768f39a4b Remove:
- CONFIG_CBFS
- anything that's conditional on CONFIG_CBFS == 0
- files that were only included for CONFIG_CBFS == 0
In particular:
- elfboot
- stream boot code
- mini-filo and filesystems (depends on stream boot code)

After this commit, there is no way to build an image that is not using
CBFS anymore.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-03 16:24:58 +00:00
Stefan Reinauer
c13093b148 simplify source tree hierarchy: move files from sdram/ and ram/ to lib/
It's only three files. Also fix up all the paths (Gotta love included C files)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-23 18:51:03 +00:00
Carl-Daniel Hailfinger
a4d4770a3e r4534 introduced devicetree.cb in every mainboard directory, but didn't
copy any comment lines before the start of the device tree.
Fix up amd/pistachio and technexion/tim8960.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4648 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 10:03:15 +00:00
Carl-Daniel Hailfinger
513e03bd96 r4646 enabled early usage of pci_{read,write}_config{8,16,32}
This allows us to change
dword = pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary,
        sm_dev->path.pci.devfn, 0x64);

to the much more readable
dword = pci_read_config32(sm_dev, 0x64);

Clean up all PCI operations in mainboards based on AMD 690:
amd/pistachio
amd/dbm690t
technexion/tim8690

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4647 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22 09:43:25 +00:00
Patrick Georgi
0588d19abe Kconfig!
Works on Kontron, qemu, and serengeti. 

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>

tested on abuild only. 

Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-12 15:00:51 +00:00
Patrick Georgi
b339e10f04 Enable CBFS everywhere. All boards compiled for me (abuild tested),
and we will fix issues as they appear.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-11 17:35:02 +00:00
Stefan Reinauer
b657a3c9b7 This fixes a couple of issues with older Linux kernels (that expect an XSDT as
soon as there's an ACPI 2.0 or later table)

* add XSDT support
* add more table types

This patch will break at least the kontron (and possibly some new boards I
missed)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21 21:38:33 +00:00
Stefan Reinauer
9dd27bc03a the tool chain settings should not be in renamed (as they will never live in
Kconfig)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30 17:13:58 +00:00
Stefan Reinauer
0867062412 This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup:

VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
	find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30 15:17:49 +00:00
Carl-Daniel Hailfinger
cff071ab0e When I started refactoring mainboard Config.lb, I added two different
files for targets without failover:
src/config/nofailovercalculation.lb (64 kB XIP)
src/config/nofailovercalculation128.lb (128 kB XIP)
Targets with other XIP sizes were ignored.

This patch moves XIP size back into mainboard code.

Benefits from this patch:
- src/config/nofailovercalculation128.lb is no longer needed
- Targets with XIP sizes besides 64k and 128k benefit from refactoring
- Conceptually, this makes the include files pure calculation files
without settings.

Abuild tested.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06 16:50:38 +00:00
Myles Watson
1725703a1d The point of the patch is to make it easier to understand the raminit
code, specifically the difference between pre_f and f code.

The only functional changes are in printk statements.  The rest is white space.

1. Remove some #if 0 and #if 1 blocks
2. Remove #if USE_DCACHE_RAM blocks.  All K8 boards use CAR.
2. Correct typos (canidate -> candidate)
3. Try to minimize the differences between amdk8_f.h and amdk8_pre_f.h
4. Try to minimize the differences between raminit.c and raminit_f.c
5. Make boards that have rev_f processors include the correct raminit code

There is much more that could be done, but it's a start.

Abuild tested and boot tested on s2892 and serengeti_cheetah.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-04 20:18:42 +00:00
Luc Verhaegen
a9c5ea08d0 Revert "CMOS: Add set_option and rework get_option."
This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660.

Stepan pointed out that "s" means string, which makes the following statement
in this commit message invalid: "Since we either have reserved space (which
we shouldn't do anything with in these two functions), an enum or a
hexadecimal value, unsigned int seemed like the way to go."

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Luc Verhaegen <libv@skynet.be>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03 14:19:33 +00:00