Commit Graph

363 Commits

Author SHA1 Message Date
Patrick Rudolph edbcd057e6 Documentation: Warn about ME cleaner on Sandy Bridge
Document known issues with 'disabled' ME.

Change-Id: I364f3ed49341523c781eb2f3b41e866f33632a7e
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32889
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-29 20:01:12 +00:00
Iru Cai c752c500fb Documentation: Add HP EliteBook 8760w
Also add the HP EliteBook document from wiki.

Change-Id: I189db9c279705af53d82af66d0c2e8afb6f84d73
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30950
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-25 12:44:03 +00:00
Patrick Rudolph 84b8f90bba mb/asus/p8h61-m_pro: Add small fixes
* Add VBT
* Configure OnBoard NIC
* Add documentation

Change-Id: Iad739b4e1dacb41f5f63247150951df7013bbf0c
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32890
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-05-23 06:19:36 +00:00
Keith Short c58e3bd90a post_code: add post code for video initialization failure
Add a new post code POST_VIDEO_FAILURE used when the Intel FSP silicon
initialization returns an error when graphics was also initialized.

BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms

Change-Id: Ibc7f7defbed34038f445949010a37c8e368aae20
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-22 17:45:11 +00:00
Keith Short 15588b03b3 post_code: add post code for hardware initialization failure
Add a new post code POST_HW_INIT_FAILURE, used when coreboot fails to
detect or initialize a required hardware component.

BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms

Change-Id: I73820d24b3e1c269d9d446a78ef4f97e167e3552
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-22 17:44:53 +00:00
Keith Short 24302633a5 post_code: add post code for memory error
Add a new post code POST_RAM_FAILURE, used when the Intel FSP code fails
to initialize RAM.

BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms

Change-Id: Ibafefa0fc0b1c525f923929cc91731fbcc1e7533
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32773
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-22 16:54:46 +00:00
Keith Short bb41aba0d8 post_code: add post code for invalid vendor binary
Add a new post code POST_INVALID_VENDOR_BINARY, used when coreboot fails
to locate or validate a vendor supplied binary.

BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms

Change-Id: Ib1e359d4e8772c37922b1b779135e58c73bff6b4
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32772
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2019-05-22 16:53:19 +00:00
Keith Short 1835bf0fd4 post_code: add post code for critical CBFS failures
Add a new post code POST_INVALID_CBFS, used when coreboot fails to
locate or validate a resource that is stored in CBFS.

BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms

Change-Id: If1c8b92889040f9acd6250f847db02626809a987
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-22 16:52:48 +00:00
Keith Short 7006458777 post_code: add post code for failure to load next stage
Add a new post code, POST_INVALID_ROM, used when coreboot fails to
locate or validate a resource that is stored in ROM.

BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms

Change-Id: Ie6de6590595d8fcdc57ad156237fffa03d5ead38
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32770
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2019-05-22 14:21:57 +00:00
Felix Singer 402fe20e3e mb/up/squared: Add mainboard
Works:
- bootblock, romstage, ramstage
- Serial console UART0, UART1
- SPI flash console
- iGPU init with libgfxinit
- LAN1, LAN2
- USB2, USB3
- HDMI, DisplayPort
- eMMC
- flashing with flashrom externally

WIP:
- Documentation
- VGA
    For some reason Seabios can not find the CBFS region
    and therefore it can't load seavgabios, but generally
    it is working as soon as Linux is booted.
- ACPI

Works not:
- Devices needs proper configuration
- Seabios can't find CBFS region

Untested:
- GPIO pin header
- 60 pin EXHAT
- Camera interface
  - MIPI-CSI2 2-lane (2MP)
  - MIPI-CSI2 4-lane (8MP)
- SATA3
- USB3 OTG
- embedded DisplayPort
- M.2 slot
- mini PCIe
- flashing with flashrom internally using Linux

Change-Id: Ia913534ec176fc600fcd4ce3af335ebe682b0ed4
Signed-off-by: Felix Singer <felix.singer@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31378
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-22 12:13:22 +00:00
Patrick Rudolph b461865577 Documentation: Add Rotundu
Add information about flash and programming header.

Change-Id: If34016e20dd580f92695bef5b67dd0c282b0b421
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32894
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-05-21 14:23:34 +00:00
Jacob Garber 2e8188aa13 Documentation/lessons: Tidy up lesson 2
- The link to create an account is now "Sign in" and not "Register"
- Use monospace formatting for terminal commands and file names
- Properly escape less-than and greater-than
- Correct the 'make lint' example command
- Reformat example commit messages
- Add formatting for website links
- Other whitespace fixes

Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Change-Id: I9931bef8c30387d1c08b59973d6de9b5c0419814
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-05-16 17:45:07 +00:00
Alan Green df85bf7918 Documentation/lessons/lesson2.md: Add reminder to check username set
If username is not set, then the ssh option is not available.
This was initially confusing for me.

Signed-off-by: Alan Green <avg@google.com>
Change-Id: I731c29a1daa9f8c298710471c7d1fe758b059d08
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
2019-05-15 17:04:47 +00:00
Patrick Rudolph fe80bf2fd1 Documentation: Convert vboot to markdown
Convert the HTML document to markdown and place it under security section.

Change-Id: I212c6d0c977fd6772371ff6676478d48cc215d6e
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32610
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-08 10:33:44 +00:00
Bluemax b4951c92a1 Documentation: Add MSI MS-7707
Change-Id: Iba38bda9becba9fcffb51afc4756023659f092ef
Signed-off-by: Max Blau <tripleshiftone@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32236
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-06 10:37:04 +00:00
Patrick Rudolph 345d202d66 Documentation: Add FIT
Describe the Firmware Interface Table and reference useful documentation.

Change-Id: I00abc1fd13be7b48d56ba8cb65d2542ed07f9017
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32325
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-04-30 08:18:57 +00:00
Daniel Maslowski e7168edeb8 Documentation/northbridge/intel/haswell/mrc.bin.md: add SPD addresses
Change-Id: I8bf81637f582373d9bba1d47fe5205d459151f3e
Signed-off-by: Daniel Maslowski <dan@orangecms.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32473
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-04-28 00:17:14 +00:00
Philipp Hug 6b6dc6eddd hifive-unleashed: update documentation to match current state
Signed-off-by: Philipp Hug <philipp@hug.cx>
Change-Id: I3f1b7dd4ef52a64c9a222f2d5cffe2b73806fe4e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-04-23 09:34:09 +00:00
Patrick Rudolph e8d8d9492d Documentation: Add small fixes
* Remove empty security.md
* Remove second H1 header from lib/index.md
* Move two documents in appropriate subfolders
* Fix file path
* Drop document overview

Change-Id: I0e9df6203e82003c01b84967ea6bd779d7583fef
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-04-19 11:36:53 +00:00
Hung-Te Lin 0043a3db20 Documentation: Explain FMAP and FMD
The Flashmap (FMAP) was not clearly documented. The new flashmap.md
explains where to find more details about that and how / why it was used
in coreboot. Also explained what is FMD and how to use it (based on
original README.fmaptool).

BUG=None
TEST=None (only documentation)

Change-Id: Ia389e56c632096d7c905ed221fd4f140dec382e6
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31766
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-04-11 11:24:32 +00:00
Patrick Rudolph d18a0cbfc1 Documentation: Make lenovo codenames human readable
Use rst parser to convert the csv to markdown tables.

Change-Id: I7fd61bd7a4e8818901520311332ae4027e7a7d02
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-04-11 11:21:10 +00:00
Patrick Rudolph 1e742217e6 Documentation: Allow the use of CSV
Allow the use of CSV files if properly referenced from markdown.
Sphinx will parse the file and create a human readable table,
allowing easy integration of autogenerated files.

Change-Id: I6fa13acf67ff1c6c9e3985054405c5446808da03
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32251
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-04-11 11:21:05 +00:00
Patrick Rudolph bff6dc7b8c Documentation: Add coreboot architecture
Describe the coreboot stages, given a short introduction what is done
and add a chart for coreboot's vs EDK II bootflow as well as the source
for the SVG.

TODO: Describe stages in detail in a separate commit.

Change-Id: I98cb61b1d0d29ac9d03f5ef3644d51a8e14bad74
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2019-04-11 11:20:40 +00:00
Maxim Polyakov bcd23b05c1 Doc/mb/asrock/h110m: update info about PEG
- Now there is no need to additionally configure the FSP
   before building;
 - PEG works with high link speed 8 GT/s (Gen 3);
 - external GPU supported, but dynamic switching between iGPU and PEG
   is not yet supported.

Change-Id: Ie0f9db47c0b88052b090cba139f0ae821758935d
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31949
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-04-10 13:56:54 +00:00
Nico Huber 44ad93e970 Docs/kconfig: Update to use CONFIG()
Change-Id: Ica7b601d1c9c3bcf39b8b805d48e969f8a944927
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32228
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-04-08 19:01:40 +00:00
Maxim Polyakov 2452c8414d Doc/mb/asrock/h110m: Fix the links
Change-Id: I7b925518416a4268037efac9060ef911e4ae74cd
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-04-06 13:47:29 +00:00
Philipp Bartsch e8fb3dfa6c Documentation/gfx/libgfxinit.md: Align line breaks
Remove word splitting '-' at line breaks, since they show up within the
lines of the rendered html.

Change-Id: Ifbd43628f60057a0666fe221de1fe85f0a29cd2d
Signed-off-by: Philipp Bartsch <phil@grmr.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32147
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-04-04 10:36:20 +00:00
Philipp Bartsch 81cd0b0aab Documentation: Fix invisible text
Encapsulate angled brackets in backticks '<filepath>' to make text
visible in html rendering.

Change-Id: I1ab926956c909aa3cd2fd92068ccb7b800dd1d4a
Signed-off-by: Philipp Bartsch <phil@grmr.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32146
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-04-04 10:36:03 +00:00
Philipp Bartsch 654d7b5e0b Documentation: Fix broken link
Change-Id: Idd08bc49fb7bf3770e03f747d97d90aacc12eada
Signed-off-by: Philipp Bartsch <phil@grmr.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32145
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-04-04 10:35:24 +00:00
Subrata Banik 413f5208f0 Documentation/soc/intel: Add MP Initialization document
This patch provides documentation for MP initialization
option available in coreboot.

Change-Id: I055808e2ddf03663e1ec5d3d423054d1caa911cb
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31841
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-03-26 11:21:23 +00:00
Subrata Banik b0f4456aed Documentation/soc/intel/fsp: Move mp_service_ppi document in corrct directory
This patch moves mp service ppi document from icelake/MultiProcesorInit.md
to ppi/mp_service_ppi.c.

Change-Id: I1bbaeb2644f219b5a1fda0c7c4b594184d53958c
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31840
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-19 21:41:34 +00:00
Maxim Polyakov 1217af5e1a mainboard: Add ASRock H110M-DVS
This board is compatible with Intel Skylake and Kaby Lake generation
processors. This patch contains the minimum configuration for booting
and stable operation of the Ubuntu OS (18.04.1, Linux kernel 4.15).
It is based on Intel RVP8 mainboard.

Intel Kaby Lake FSP 3.6.0 is used to initialize CPU and PCH.
Graphics init with libgfxinit.

Works:
  - Integrated graphics (only DVI port, tested with 1920x1080);
  - PEG x16 (FSP must be configured with BCT to enable PEG);
  - all PCIe x1 slots;
  - all USB and SATA ports;
  - SuperIO COM port for console;
  - onboard audio.

TODO:
  - other SuperIO functions;
  - onboard network chip;
  - suspend and resume;
  - documentation.

Tested on Intel Core i5-6600 processor with Seabios (rel-1.12.0-10-
g171fc89) and Tianocore/edk2 (vUDK2018-8-ge6eccfc) as a payload.

Change-Id: I69396edc50948cf1d0da649241ce92171d32daf7
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-03-19 21:36:49 +00:00
Julius Werner ada45a3148 Revert "Documentation: Our coding style now allows 80 + 2*8 columns in a line"
This reverts commit b3a8cc54db.

This change was submitted under the incorrect assumption that there was
agreement on a coding style change. There wasn't, so while the issue is
under discussion we should revert to the previous status quo.

Change-Id: I37a5585764346af11a98bdf58c810dd3cf5bfe40
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31915
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-15 23:04:56 +00:00
Balazs Vinarz bc07224da5 Documentation: Add Asus F2A85-M
Change-Id: I4d195f4833ba71fdc559815cafb0f5d0d254e897
Signed-off-by: Balazs Vinarz <vinibali1@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30895
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-03-14 11:24:24 +00:00
Subrata Banik ebac8c772f Documentation/soc/intel/fsp/ppi: Document new feature to dispatch external PPI
Some new feature added into FSP specification to perform dispatching
of external PPI service from boot firmware (coreboot) to FSP.

Change-Id: Iaf6b54ccd27e21860539bb2a9966054fdb027108
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31839
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-12 04:23:58 +00:00
Subrata Banik abc5130108 Documentation/soc/intel: Add documentation for Intel FSP
This patch combines open source documentation for Intel FSP
specification.

Change-Id: I3a8bc0198a1e01ec019139b728834713978501ba
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31838
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-12 04:23:00 +00:00
Patrick Georgi d9a5779a0e Docs/project_ideas: Add a "parse SerialICE traces" project idea
Change-Id: I696811ff93948358f03ff617d294ecc40bd4c746
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31820
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-03-09 12:46:09 +00:00
Patrick Georgi 1ddccbf2d2 Docs/project_ideas: Add a stub for Ghidra integration
It may be useful to have a common, easily available toolbench for
firmware analysis and Ghidra looks promising.

Change-Id: I56d0ff875bb939f6d31f088232f8a6fd168abbb6
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31806
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-09 12:45:56 +00:00
Patrick Georgi d29ed4ac45 Docs/project_ideas: Expand "toolchain" project description
One-off packages do us little good, we need to be able to automate
building them.

Change-Id: Idd9b6b231435ea9d6e946c7ccaa71174b497742c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31804
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-08 10:00:52 +00:00
Patrick Georgi b3a8cc54db Documentation: Our coding style now allows 80 + 2*8 columns in a line
Update the document to match clang-format and checkpatch formally, and
provide a rationale.

Change-Id: I597a27d4e22d07e033b36f0dceb554ac1d8d5789
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-03-08 08:16:15 +00:00
Patrick Georgi b431833c12 Docs/project_ideas: Add coverity scan cleanup project
Change-Id: I16d9a7f7088254c5c207adc9299a8525bf38199f
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-03-07 17:07:32 +00:00
Patrick Georgi c7b8357786 Documentation: Add myself as potential mentor for QEMU targets
Change-Id: I11df0283f14ae03243247fe9377754b216df0442
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31556
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-07 17:07:20 +00:00
Philipp Deppenwiese c9b7d1fb57 security/tpm: Fix TCPA log feature
Until now the TCPA log wasn't working correctly.

* Refactor TCPA log code.
* Add TCPA log dump fucntion.
* Make TCPA log available in bootblock.
* Fix TCPA log formatting.
* Add x86 and Cavium memory for early log.

Change-Id: Ic93133531b84318f48940d34bded48cbae739c44
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29563
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-03-07 12:47:01 +00:00
Philipp Deppenwiese 66f9a09916 security/vboot: Add measured boot mode
* Introduce a measured boot mode into vboot.
* Add hook for stage measurements in prog_loader and cbfs.
* Implement and hook-up CRTM in vboot and check for suspend.

Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/29547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-25 22:29:16 +00:00
Patrick Georgi 31b4eb6c4a Documentation: take the sting out of the requirements
The requirements read a bit as if we only encourage coreboot experts to
try to take on these projects. These requirements should be understood
as "this is what you'll need to learn", hopefully guiding interested
people in picking a project that suits their interests.

Change-Id: I43b6e2e0df5f00e1ded8d14cee8c771e3f595ce7
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31480
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-20 16:15:05 +00:00
Patrick Georgi 0a186ca8a9 Documentation: Add Clang support to project ideas
Change-Id: Iaccb5ca5606b83a4b37930b4399ddcf9eddd494b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-02-20 16:12:21 +00:00
Patrick Georgi 04aae87da7 Documentation: Add past talks to conferences page
Change-Id: I2b8a0ebda3c8fa7d1777a6f0628fd99d73a0d341
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-02-19 07:10:20 +00:00
Martin Kepplinger 4f40b0a117 Documentation: add Skulls to the list of distributions
There seem to be enough users of the Skulls images to have the project
listed in our docs.

Change-Id: I5a8f24005fec87d53af7ad53370cb6a704378622
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/c/31463
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-02-18 16:06:53 +00:00
Nico Huber 1e411a6402 Documentation/lesson1: Update references to compiler packages
Change-Id: Ie9daa70c56552cccfe28e9a4903f87d43221375e
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/31447
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-02-18 13:36:09 +00:00
Patrick Georgi 3ce88e1fa0 Documentation: Add broader payload coverage to project ideas
A couple people discussed recently how it's a shame that on some
architectures we can bring up a device but then have nothing to do with
it afterwards. Having payloads to choose from would help a lot there.

Change-Id: Ia66f22947d09afe3076cc2ee12f5b652fe80fc3a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31415
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-02-17 22:10:46 +00:00
Werner Zeh 50baa88184 Documentation: Add KASAN to the project ideas list
Adding the Kernel Address Sanitizer feature to coreboot would help to
find bugs.

Change-Id: If00010e81147ec50e037678230df17c6888e40a2
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/31414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-02-15 20:37:29 +00:00
Martin Kepplinger 5349dd14d6 Documentation: remove the upcoming events chapter from the conferences page
I think our docs inside of the codebase might not be the ideal place
to announce future events.

First, they might be scheduled so shortly before the conference that the
change, if at all done, would barely make it to the repo and the web. Also,
_if_ really maintained, it would churn the docs unnessesarily. But, I doubt
that anyone of us would want to maintain this here at all. Lastly, I think
that nobody out there would _look for_ upcoming events in coreboot's
documentation. We have bigger problems in the Documentation directory than
this :)

Change-Id: I918e17a427405a05722c6e0d61dc422f94cac809
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/c/31266
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-11 12:22:38 +00:00
Martin Kepplinger cf39eea2f8 Documentation: add the most recent talks to the conferences page
Add Philipps great 35c3 talk and Davids and Andreas fosdem talk to the
conferences page. linuxboot adds those to their website too but they
can't be linked to too often :)

Change-Id: I1e7ce078020dc5e9c9d9d47210c70ee16ef2f82e
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/c/31265
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-11 12:22:19 +00:00
Martin Kepplinger 57fead75ba Documentation: add link to chromebookdb.com to distribution page
As suggested by Philipp, let's add this link.

Change-Id: I6ff21f37a04dc5a9c3db1ff7ac9a786fb0b51211
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/c/31263
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-02-11 12:17:53 +00:00
Martin Kepplinger a00518a3c4 Documentation: add the Heads project to the list of distributions
As this is a unique, actively maintained project, we should probably
point there too. The text is just copied parts of the http://osresearch.net/
website.

Change-Id: Ib2a8e4b28bc94c5dc6a1ae9388f96ad2c502ccab
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/c/31257
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-11 11:58:56 +00:00
Patrick Georgi 2aaf169cbe Documentation: Mention PC Engines as ships-with-coreboot hardware
Change-Id: I9d57abcff9c2472cc58b7fbca00441cd38a7f1a1
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31259
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
2019-02-07 22:27:36 +00:00
Matt DeVillier 0226789dcc Documentation: update/improve distribution listing
- improve descriptions of Purism and ChromeOS hardware
- add entry for Libretrend Librebox
- improve description of Mr Chromebox and John Lewis'
  3rd party ChromeOS firmware offerings

Change-Id: I66bd1a3701091e499d88738a7c06126de66e58ff
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-02-06 14:16:51 +00:00
Patrick Georgi 8fe2d5403f Documentation: Add Project Ideas document
We already had such a page on the wiki, but it's outdated and the wiki
is supposed to go the way of the dodo anyway.

This is a fresh start to make sure that all ideas we're coming up with
are still current and that there are mentors willing to support them.

Change-Id: Idd68f845930bd37a2293969b9a153cf584d6d15f
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30972
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-06 09:22:45 +00:00
Patrick Georgi 1615ad67b5 Documentation: describe coreboot on the dev site's landing page
Get some content on the documentation site's front page.

Change-Id: I7f36234ef783e041a44590858bb75a69b96ee668
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31127
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-02-05 22:25:26 +00:00
Patrick Georgi 7bb9a4f98b Documentation: Describe our ecosystem
Neither payloads nor distributors are an integral part of the coreboot
source tree, but they're very important parts of the coreboot
ecosystems, so add some descriptions.

Change-Id: Id64744c252b6b78c4811fbded48c441ef486ad94
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-02-05 21:21:45 +00:00
Patrick Georgi 0cd9366df1 Documentation: Allow passing arguments into make livesphinx
It's what the doc.coreboot.org docker container is running and when
using its livehtml feature, it listens at localhost, which isn't always
desirable.

With `docker run -e SPHINXOPTS="-H $localip" ...` it now listens at
localip, which is more flexible.

Change-Id: Ia0614e57458c32169f6d614783366025e9c814b3
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31128
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-05 21:15:37 +00:00
Patrick Georgi b5b135ccd7 Documentation: Add some description of our communal places
Change-Id: Iede98359c22aefbfd5725a5e7cd661ef18d7284e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31146
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-30 23:14:25 +00:00
Arthur Heymans a35904b29c Documentation: Add coding style
This is the old wiki page https://www.coreboot.org/Coding_Style
coverted from mediawiki to markdown.

Change-Id: Id56a8b7500121c4d9c18bc0b6bbc2c05402268dc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30834
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-30 11:47:56 +00:00
Patrick Georgi 619f2b102d Documentation: Fix up list of releases
4.9 was still marked as "upcoming" and 4.10 was missing altogether,
leading to a sphinx warning.

Change-Id: I008d546715b7841eb9f325a6f698380dd4c1a7c2
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/31126
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-28 23:22:09 +00:00
Philipp Hug 2ef569a405 mb/qemu-riscv: update to match current qemu version
Boots again to payload not found on qemu.

Change-Id: Ie107eb882cbaac5a5a06c1ff990e7b9364377640
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/30554
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-26 13:40:51 +00:00
Bill XIE 9cb2da45d8 mb/lenovo/x220: Add x1 as a variant
ThinkPad X1 ( https://www.thinkwiki.org/wiki/Category:X1 ) is nearly a
clone of X220, with additional USB3 controller on pci-e (as i7 variant
of x220), and a powered ESATA port wired to ata4 (Linux' annotation).

Documentation added.

Tested:
- CPU i5-2520M
- Slotted DIMM 8GiB
- Camera
- Mini pci-e on wlan slot
- Msata on wwan slot
- On board SDHCI connected to pci-e
- USB3 controller connected to pci-e
- NVRAM options for North and South bridges
- S3
- TPM1 on LPC
- Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from
  SeaBIOS, or Linux payload (Heads)

Not tested:
- Fingerprint reader on USB2
- Onboard USB2 interfaces (wlan slot, wwan slot)

Change-Id: Ibbc45f22c63b77ac95c188db825d0d7e2b03d2d1
Signed-off-by: Bill XIE <persmule@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-17 17:09:53 +00:00
Arthur Heymans 3ef017c4d4 [RFC]util/checklist: Remove this functionality
It was only hooked up for galileo board when using the obsolete
FSP1.1. I don't see how it can be useful...

Change-Id: Ifd7cbd664cfa3b729a11c885134fd9b5de62a96c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30691
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-14 19:42:59 +00:00
Tristan Corrick 907bd5d44e Doc/mb/asrock/h81m-hds: Link to the Haswell documentation
Change-Id: I50da6da6c1321f8d9d94b11d19187a8c22709705
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30690
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-09 09:53:57 +00:00
Tristan Corrick 9747f886db Doc/mb/supermicro/x10slm-f: Remove PCIe issue that has been fixed
The issue in question was resolved with commit 334be3289d
("nb/intel/haswell: Add support for PEG").

Also add a link to the known issues for Haswell, which has some
information on PCIe.

Change-Id: Icc3061b60893394e3d537d3b86f4ac748cec2eb4
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30689
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-09 09:53:41 +00:00
Patrick Georgi d0b7adac7a Documentation/releases: Note the disappearance of device_t
That was truly a huge task.

Change-Id: Ifd79aaf005bf39744bd4fd930ba2441f966ec0b3
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-01-08 12:32:32 +00:00
Patrick Georgi ef2ac9b14c Documentation: Add 4.10 release notes template
Change-Id: Ibb7aab2367c379bbf7ab93a41ce06095916d0f95
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30345
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-01-08 12:32:21 +00:00
Patrick Georgi 3c86293dc1 Documentation/gerrit: Update parts about WIP and draft commits
Gerrit dropped the "draft" concept and replaced it with private commits
and work-in-progress commits, options that can be used independently
from each other.

Change-Id: I6abe267c2091c750fc234057be3a4e62adb59c4c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30309
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-07 21:18:07 +00:00
Patrick Georgi 109b8589ca Documentation: Update 4.9 release notes
Change-Id: Ib1057541dc0decd98921f3c84de3c08f10cd802e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30344
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-04 13:12:42 +00:00
Tristan Corrick b03e994233 Doc/mb/asrock/h81m-hds: Remove PCIe issue that has been fixed
PCIe graphics for display output still doesn't work, but that is now
listed in the Haswell-specific documentation.

Change-Id: I28c50db353b2b965eb847b379d9e1944cb720c77
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-01-03 20:07:48 +00:00
Tristan Corrick a6fe456cb5 Doc/nb/intel/haswell: Add a list of known issues
Change-Id: If0339831550f6c70e8056f78633e9a402f35a793
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30455
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-03 20:07:41 +00:00
Tristan Corrick 1ccf83c971 Doc/nb/intel/haswell: Mention util/chromeos as a way to get mrc.bin
Change-Id: Ic099d0f052db5ef6a699d54b26028bae2fae4770
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-01-03 16:52:13 +00:00
Tristan Corrick 44095c1edc mainboard: Add Supermicro X10SLM+-F
This board runs well with coreboot. The documentation part of this
commit lists what works and what doesn't.

Tested with GRUB 2.02 as a payload, loading SeaBIOS 1.12.0 which then
boots FreeBSD 11.2. It has also been tested with GRUB directly booting
Debian GNU/Linux 9.6 (kernel 4.9).

Change-Id: I291573d4651bdffe24eb841033ea6189fcbf8502
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-12-29 18:26:46 +00:00
Tristan Corrick cbc561f64a Documentation/nb/intel: Add Haswell documentation
At the moment, this just gives some details on the MRC.

Change-Id: I84e8ca2543b2e19b84a24f7d7032a4aedb6e9272
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-12-24 08:16:06 +00:00
Jonathan Neuschäfer a2faaa9a27 Documentation/mb/intel/kblrvp11: Fix table formatting
Without this patch, Sphinx 1.7.9 prints the following warning, and
doesn't emit the table as HTML:

  /.../Documentation/mainboard/intel/kblrvp11.md:1: WARNING: Malformed table.

  +------------------+---------------------------------------------------+
  | CPU              | Kaby lake H (i7-7820EQ)                          |
  +------------------+---------------------------------------------------+
  | PCH              | Skylake PCH-H (called SPT-H)                      |
  +------------------+---------------------------------------------------+
  | Coprocessor      | Intel ME                                          |
  +------------------+---------------------------------------------------+

Change-Id: I17920398126d57eb8815c45e4a0d4b100f46004a
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-12-20 14:20:49 +00:00
Jonathan Neuschäfer 990c84db9d Documentation: gerrit guidelines: Adopt the new topic syntax
When the old syntax is used, gerrit now respends with:

    remote: WARNING: deprecated topic syntax. Use %topic=TOPIC instead

Change-Id: I002bfc3e9c4b348379337bc386d3bdefb307679d
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29983
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-19 11:08:22 +00:00
Evgeny Zinoviev ad55df9874 Documentation/releases: Add W530 mainboard to 4.9 relnotes
Change-Id: I9651b24dd68f9a5e324a4532c3cebac32aacca7e
Signed-off-by: Evgeny Zinoviev <me@ch1p.com>
Reviewed-on: https://review.coreboot.org/c/26885
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-19 11:08:12 +00:00
Patrick Rudolph f04e76bcf0 Documentation: Add arch x86
Describe state and assuptions made about x86_64 support.

Change-Id: I308a09b0eac269afd30df95ed3ea195238a6cfbe
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/30056
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-19 10:31:07 +00:00
Michael Bacarella ab5890d498 Documentation/lessons/lesson2.md: clarify running make gitconfig
It's easy to misinterpret or miss altogether the instruction to
run 'make gitconfig', which will cause strange problems a few
commands later.  Revise the documentation to make it clearer.
Also adds a blurb further down with a link to find Gerrit
workflow docs.

detached from FETCH_HEAD
Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Change-Id: I49734c724c4d6da716a358cd849938ef14dab3b1
Reviewed-on: https://review.coreboot.org/c/30060
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-19 10:29:47 +00:00
Michael Bacarella 54e80cec9f Documentation/mainboard/lenovo/t420.md: fix typo
Picture of mainboard wasn't displaying.

Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Change-Id: Ia70f5d5ad2fdf4c0e811ab92a817375a89694122
Reviewed-on: https://review.coreboot.org/c/30170
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-19 10:28:46 +00:00
Stefan Tauner 47d6663bba utils: introduce find_usbdebug.sh to help find USB debug ports
Carl-Daniel made this script a long time ago but it never was picked up
in the tree. Now that USB debugging is way more common it makes
sense to include it.

I have made a number of changes to the original version:
* -h help text
* check for running as root
* enhanced readability (test -> if)
* new execution flow and refined output that better shows the device(s)
  attached to the debug port(s)
* handling of Intel rate-matching hubs
* hiding of (bogus) error messages from lspci and lsusb

Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Change-Id: Iadf775e990f5c5f91a28d57e3331d1f59acee305
Reviewed-on: https://review.coreboot.org/c/9305
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-19 10:21:32 +00:00
Praveen hodagatta pranesh a86c198cd5 Documentation/../../kblrvp11: Add RVP11 documentation
Signed-off-by: Praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com>
Change-Id: I01509c2fa2c127b77ae72b8b0aaac0f826b0bedd
Reviewed-on: https://review.coreboot.org/c/29859
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Boon Tiong Teo <boon.tiong.teo@intel.com>
2018-12-19 05:51:18 +00:00
Jonathan Neuschäfer 4e21dee863 Documentation/*/fit.md: Fix reference to arm64 FIT implementation file
Change-Id: I5844642e25f4c9fe114f621446b4df1075500441
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
2018-12-19 05:18:58 +00:00
Jonathan Neuschäfer dca74c16a3 Documentation/soc/intel/icelake: Fix references between documents
Change-Id: Ifbdab15b1183998712f92d1f2f5340d2ad1451dc
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30157
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
2018-12-19 05:17:58 +00:00
Jonathan Neuschäfer 84eb41d74c Documentation/soc/intel/icelake: Fix indentation in numbered list
Without this patch, the numbers restart at 1 at several points in the
HTML output.

Change-Id: Ie3634775ed9f993b1181785c58d72834183336e1
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30156
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
2018-12-19 05:17:39 +00:00
Jonathan Neuschäfer 726adde879 Documentation/lesson2: Add quotes to increase readability
Change-Id: Ibb041965bb9a97d153ace1f697607e524a6f50ac
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30165
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-18 13:25:56 +00:00
Jonathan Neuschäfer 6b867b8aa8 util/bucts: Add a description.md file
Change-Id: I367703ffcd8d10dec0c67b61c9ebbefd497424fd
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-18 13:24:56 +00:00
Jonathan Neuschäfer 45e6c82e68 Fix typos involving "the the"
Change-Id: I179264ee6681a7ba4488b9f1c6bce1a19b4e1772
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-12-18 13:24:28 +00:00
Patrick Georgi 781ae4aeb7 Documentation/CoC: make clearer it's also for real world events
It's not just for the mailing lists, tools and IRC channel.

Change-Id: I23883cfd8200496f4281d73b6e75fac0d3448a3c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-12-10 23:45:42 +00:00
Patrick Georgi 493233c4fd Documentation/CoC: revise the instructions for contact the arb team
It's not very helpful to tell somebody who feels wronged "that their
mail was probably lost" (in just as many words).

State why we don't go for a mailing list or ticket system for grievances
and encourage contact multiple people from the outset.

Change-Id: Idac4bcdf8b596a7325e463036c580b17a8b2f27b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30086
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-12-10 23:44:57 +00:00
Patrick Georgi e775a90a30 Documentation: Import Code of Conduct from Wiki
I reordered the contacts by current activity and added a link to the
CC-BY-SA license, otherwise it's the original text.

Change-Id: I6f41611db8d9a2f60b24d95abdf30f4fd47cd6f2
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-12-10 23:44:38 +00:00
Patrick Georgi 9373e59bb2 Documentation: Add documentation about the release process
It's originally written by Martin who graciously allowed to me rework it
a bit and push it into coreboot's documentation.

Change-Id: I14938d678e4620abec7ed5f0d35dddaf00edda6d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30082
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-10 23:43:51 +00:00
Bill XIE 012ef7735d mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
The code is based on autoport and that for T430s

Tested:
- CPU i5-3337U
- Slotted DIMM 2GiB
- Soldered RAM 4GiB from samsung (There may be more models here)
- Camera
- pci-e and usb2 on M.2 slot with A key for wlan
- sata and usb2  (no superspeed components) on M.2 slot with B key for wwan
- On board SDHCI connected to pci-e
- USB3 ports
- libgfxinit-based graphic init
- NVRAM options for North and South bridges
- Sound
- Thinkpad EC
- S3
- TPM1 on LPC
- EHCI debug on SSP2 (USB3 port on the left)
- Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from
  Linux payload (Heads), Seabios may also work.

Not tested:
- Fingerprint reader on USB2 (not present on mine)
- Keyboard backlight (not present on mine)
- "sticky_fn" flag in nvram

Not implemented yet:
- Fn locking in nvram (may not be identical to "sticky_fn")
- C-based native graphic init (since T431s has eDP instead of LVDS)
- Detecting the model of Soldered RAM at runtime, and loading the
  corresponding SPD datum (3 observed) from CBFS (the mechanism may be
  similar to that on x1_carbon_gen1 and s230u, but I do not know how
  to find gpio ports for that, and SPD data stored in vendor firmware.)

Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a
Signed-off-by: Bill XIE <persmule@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-12-07 11:20:53 +00:00
Michael Bacarella 8bed5efad7 Documentation/flash_tutorial/index.md: warn about dots painted on ICs
I fried my mainboard because I tried to orient my chip by lining a blue dot on
the corner of my chip with a dot depicted on the chip datasheet.  They
apparently have nothing to do with each other, and this is normal.  Add
warning about this to the docs to hopefully spare others from a similar fate.

Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Change-Id: Ib634589aaa11f75bde2ef2e13d2cacc4cae19a3f
Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-12-05 14:10:12 +00:00
Michael Bacarella 134c30761e Documentation/mainboard/lenovo/t420.md: add pic of chip
Provide pic of the flash IC with pinouts labeled, as well
as additional text about the chip.

Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Change-Id: I9046fa63dcd4d192836417efac68ca7587ac1c91
Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30027
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-12-05 07:02:32 +00:00
Michael Bacarella 106a0823c9 Documentation: Clarify minor detail on preparing a layout file
The user needs to pass the original firmware image to create
a layout file, not the newly compiled coreboot image.

Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Change-Id: If47a88f06076da12d8da7a873c3e5ef64fc1f877
Reviewed-on: https://review.coreboot.org/c/30024
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-04 10:25:42 +00:00
Michael Bacarella be1907a513 Documentation: Clarify workflow for cloning coreboot from Gerrit.
Documentation that was there seems to reference and older version.

Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Change-Id: I3709613ae065153123d00801ea1b4ff86b100264
Reviewed-on: https://review.coreboot.org/c/30025
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-04 10:25:00 +00:00
Michael Bacarella 24c0b6abd6 Documentation: s/My/Your/ in getting started with Gerrit docs
Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Change-Id: I781e2d78c0525da74dd77f572839d746d3eeb3ce
Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30026
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-12-04 10:23:38 +00:00
Jonathan Neuschäfer c22ad581c8 arch/power8: Rename to ppc64
POWER8 is a specific implementation of ppc64, which is by now outdated
(POWER9 has been on the market for a while). Rename arch/power8/ to
potentially cover a wider range of hardware.

TEST=Toolchains built before/after this commit can build coreboot for
     emulation/qemu-power8 from before/after this commit.

Change-Id: I2d6f08b12a9ffc8a652ddcd6f24ad85ecb33ca52
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29943
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
2018-11-30 20:02:17 +00:00
Philipp Deppenwiese aea00f496b broadcom: Remove SoC and board support
The reason for this code cleanup is the legacy
Google Purin board which isn't available anymore
and AFAIK never made it into the stores.

* Remove broadcom cygnus SoC support
* Remove /util/broadcom tool
* Remove Google Purin mainboard
* Remove MAINTAINERS entries

Change-Id: I148dd7eb0192d396cb69bc26c4062f88a764771a
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29905
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-30 10:26:37 +00:00
Subrata Banik 13415333fe Documentation/../../dragonegg: Add dragonegg coreboot development documentation
Change-Id: Ia15e317557a0893d9f80cc9e87c6b90c85b93dcf
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/29829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-27 08:57:07 +00:00
Subrata Banik 0c273ae208 Documentation/../../icelake_rvp: Add RVP coreboot development documentation
Change-Id: If063cbd3436d9ee107945f425a31ba0009039a1d
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/29828
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-27 08:56:49 +00:00
Subrata Banik 92d7017a04 Documentation/../../icelake: Add Ice Lake coreboot development documentation
Add documentation for Ice Lake processor family coreboot development.

Documented so far:
* What is Ice Lake
* Development Strategy
* Create coreboot Image
* Flashing coreboot

Change-Id: Ief4df6ca11f95b75ecddeb560f7887bfadced086
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/29805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-27 08:56:05 +00:00
Nico Huber d67edcae6e soc/intel/common: Bring DISPLAY_MTRRS into the light
Initially, I wanted to move only the Kconfig DISPLAY_MTRRS into the
"Debug" menu. It turned out, though, that the code looks rather generic.
No need to hide it in soc/intel/.

To not bloat src/Kconfig up any further, start a new `Kconfig.debug`
hierarchy just for debug options.

If somebody wants to review the code if it's 100% generic, we could
even get rid of HAVE_DISPLAY_MTRRS.

Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/29684
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-23 08:34:16 +00:00
Patrick Rudolph 0b8aefc656 Documentation: Add W530 / T530
Change-Id: Ib253308737f8c7a497c6ca13eab88220b1ac27ad
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/29685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-11-19 09:34:38 +00:00
Arthur Heymans 0115606286 mb/intel/dg43gt: Add documentation
Change-Id: I4e9dc67e66f719d440679b11332e2c8a764024f4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28258
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-11-17 16:51:43 +00:00
Tristan Corrick 3693294112 mainboard: Add ASRock H81M-HDS
Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with
kernel 4.9.

This board works quite well under coreboot. A list of what works and
what doesn't can be found in the documentation part of this commit.

The file `data.vbt` matches the VBT in the latest stable version of the
vendor firmware (version 2.20).

Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/29390
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-11-16 10:05:26 +00:00
Patrick Rudolph c0a1625df1 mb/lenovo/t400: Improve docking code
* Remove dead code
* Add support for types 2504 and 2505
* Print dock info at romstage entry
* Improve dock disconnect for type 2505
* Move defines into dock.h for future ACPI code
* Reduce timeouts according to spec to decrease boot time on error
* Fix no docking detection (reduces boot time by 1 second)
* Configure GPIO LDN before reading GPIOs
* Use Kconfig values instead of fixed defines
* Add documentation

Tested on Lenovo T500 with docking 2504 and 2505.

Change-Id: Ic4510ffadc67da95961cecd51a6d8ed856b3ac99
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/29418
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-11-10 11:51:27 +00:00
Paul Menzel b06f8ddfe8 Documentation/riscv: Improve `index.md`
1.  Add dot/period to the end of sentences
2.  Remove blank line at the end of the file
3.  Break lines after 75 characters
4.  Use RISC-V spelling
5.  Add comma for clarity

Change-Id: Icbe803dfbe92ca7850204a1a9f7175befe9c8bcf
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/28654
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-30 02:10:44 +00:00
Patrick Rudolph 82b1e019a5 Documentation: Improve payload fit
* Convert '' to `
* Add example how to use mkimage

Change-Id: Id83db3db51582cb0d6ded7f3152b5549fba1f2e7
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/29319
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-29 11:21:47 +00:00
Jonathan Neuschäfer 84bf089f6a Documentation/mainboard: Add emulation/spike-riscv.md
Move the usage instructions from their ad-hoc place in Kconfig.name to
the Documentation directory, and expand them a bit.

Change-Id: Id6c7bbca40a21ecba00cab736af2f2662a985106
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28874
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
2018-10-29 11:19:34 +00:00
Patrick Rudolph 39315985e8 Documentation: Fix markdown inline code
recommonmark doesn't know about inline code, while all other software generating
documentation is able to handle it.
Add support for inline code by adding a wrapper class around the recommonmark
parser that converts code to docutils literal blocks.

Fixes invisible inline code in current documentation.

Change-Id: I0269d15a685ed0c0241be8c8acfade0e58363845
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/29206
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-22 12:02:28 +00:00
Patrick Rudolph 7187758038 Documentation: Fix markdown highlighting
Fix some code blocks that use invalid Markdown syntax.

Change-Id: I8cfe63b2c21ae93923f88bbf7ef4cfb8dccdb5ef
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/29207
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-22 12:02:15 +00:00
Jonathan Neuschäfer 806ad196f3 Documentation: Improve message printed by livesphinx target
Printing "Autobuild finished" after the autobuild server exits (which
normally doesn't happen) is not very useful.

Change-Id: I909d7ab5f399993dbb1916e66ba94c48d7bc53bf
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-11 01:22:35 +00:00
Jonathan Neuschäfer d3037bdf64 Documentation: Add and link the arch directory
Fixes: b159d5ba8f ("riscv: add documentation for stages and payloads")
Change-Id: I5ca8ed094c9b6d115da707375205872e782a66b2
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-11 01:22:21 +00:00
Jonathan Neuschäfer a85951fb2f Documentation/releases: Improve readability
A colon usually indicates that something related follows. But in
Documentation/releases/index.md, nothing followed. Fix this by swapping
two lines.

Change-Id: I3e2750c208a2b725145b94615f64381ac763f0dc
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28990
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-11 01:22:12 +00:00
Patrick Rudolph 6f027ff28a Documentation: Improve elgon documentation
* Convert PNG to JPG and reduce image quality.
* Mark flash IC and USB serial connector.
* Mark SPI programming header.
* Add programming header pinout.

Change-Id: Ica5958545ed23573a0d48dfa422ad1a822d06b47
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/28966
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-08 08:45:17 +00:00
Jonathan Neuschäfer fd29ff3555 Documentation/mb/sifive: Fix dead links
SiFive's website was reorganized, which broke our links to PDF files.
Update these links to the current ones, obtained by browsing
https://sifive.com/documentation/.

Change-Id: I312de84bf12abb0789bdd971c40033f1e4ea0dd1
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28952
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-10-06 21:32:11 +00:00
Angel Pons 3b6bddafe7 Documentation/mainboard/gigabyte/ga-h61m-s2pv: Expand page
Uniformize the Yes/No in the tables, expand the internal programming
section and explain how to patch a defective flash descriptor.

Change-Id: I972bb8948c29ce0eba46daa92ce6b6052db7b063
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28833
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-10-05 21:14:54 +00:00
Jonathan Neuschäfer 8ded4ce1aa Documentation/.../gerrit_guidelines: Remove trailing colon from headings
They are unnecessary in headings, and look slightly irritating in the
table of contents.

Change-Id: I7344026f5753aebdd73f9fe414e96730c823ac26
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28832
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-10-04 09:40:18 +00:00
Jonathan Neuschäfer 2fd4907a4d Documentation: Spell "blob" in lowercase
It's not an acronym (outside of database software).

Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28827
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-04 09:39:32 +00:00
Jonathan Neuschäfer c831fb8b89 Documentation/mb/lenovo/t4xx_series: Change "Steps to access the flash IC" to sub-heading
This heading should not be a top-level heading, because it's not at the
top of the file.

Also remove the trailing colon, because it's unnecessary in a heading.

Change-Id: I0685bb8734ad899c29618d24c0497e4fb8c0d01c
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28826
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-10-03 13:29:17 +00:00
Patrick Rudolph 15d8405584 Documentation: Add basic flashing tutorial for Lenovo
* Add basic flashing tutorial
** Describe internal and external flashing
** Describe flash supply diode protection
** Gives general advices on flashing
** Describe how to use flashrom --ifd
*  Describe basic flashing on Lenovo T4xx devices
** Describe how to disassemble and access the flash IC on T4xx
** Describe flash layout on Sandy Bridge and Ivy Bridge series.

Change-Id: Ia833e27f4e7d89ee32be9bed21a0c021839facec
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/27852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30 03:20:36 +00:00
Patrick Rudolph 3d1d966dd8 Documentation: Describe recommonmark's auto_toc_tree
Explain recommonmark's auto_toc_tree and give an example to make writing
documentation easier. Show an example what happens if the document
isn't included in any toctree.

Change-Id: I4938d8d292ea890caec6d396b4fa04da65e398f4
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/28427
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30 03:18:25 +00:00
Tom Hiller ffe6d54151 Documentation: Disable auto_doc_ref
According to recommonmark's documentation the enable_auto_doc_ref is deprecated.
This is not true, as it's broken with Sphinx 1.6+ commit
12d639873953847de31ec99742b42e50e89ed58c.

recommonmark bug report is here: https://github.com/rtfd/recommonmark/issues/73

Instead of using this feature, which doesn't support top level directories in
the relative document path anyway, use the TOC tree or inline RST code.

Disable auto_doc_ref and document how to reference documents.

Change-Id: I9319985b504c4215c33ebbeb9c38317b9efcb283
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/28550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30 03:18:05 +00:00
Evgeny Zinoviev e180825080 Documentation: add description for util/pmh7tool
Change-Id: Iab5daf101a9ff27aa49b7849bf6bf39362b8db09
Signed-off-by: Evgeny Zinoviev <me@ch1p.com>
Reviewed-on: https://review.coreboot.org/28368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-30 03:17:39 +00:00
Philipp Deppenwiese 8c678cf46a mainboard/opencellular/elgon: Add mainboard support
Tested on Elgon EVT board and boots into GNU/Linux.

TODO:
* Add hard reset function for VBOOT.
* Add EC code
* Add SPI flash write protection

Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/28024
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30 03:08:22 +00:00
Jonathan Neuschäfer 4586ccdfe6 Documentation/lib/payloads/fit.md: Consistently indent with tabs
Sphinx displays a tab as four spaces, which makes code indented with
eight spaces per level stand out. Format the example configuration file
in fit.md consistently with tabs to make it look consistent everywhere.

Change-Id: Ia1d4c44e68e5267bac1f0f558421c6a0c7a9329c
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28734
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-28 09:53:33 +00:00
Jonathan Neuschäfer bdebc8918c Documentation: Remove Kconfig.tex and related infrastructure
This part of our documentation has bitrotted for a long time.
Any remaining information should ideally be moved to
Documentation/getting_started/kconfig.md.

Change-Id: I3920d002813c2838285446dc0ed8dacfa5364581
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28665
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-26 18:51:56 +00:00
Tom Hiller 3a7e7c1998 Documentation: fix sphinx warnings
Fix warning from list in table cells for nri_registers.md

Change-Id: I2b77ad266d1c5f693536e161f96f3db19832989c
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/28354
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-21 14:08:47 +00:00
Jonathan Neuschäfer d91b5cf5c9 Documentation/mb/intel/sandybridge/nri: Change column name to "Comments"
This column doesn't really contain a description, but additional
comments.

Change-Id: I714972ee336bc1f8a4feb75292ee9efa583f0bb1
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28625
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-16 13:04:41 +00:00
Ronald G. Minnich b159d5ba8f riscv: add documentation for stages and payloads
Change-Id: Iff522e309e9cf9a31c1c79c24047d83d7fd0b00a
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/28619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-15 12:52:32 +00:00
Philipp Hug 2326a284ac riscv: add trampoline in MBR block to support boot mode 1
Add "j pc + 0x0800" at the beginning of the MBR to jump to bootblock.

Tested on hardware:
boot mode 15: works as before
boot mode 1: jump to bootblock works, but bootblock needs to be modified to
move the stack to L2LIM. This will be in a separate commit.

Further changes are needed in the bootblock

Change-Id: I16e762d9f027346b124412f1f7ee6ff37f431d86
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/27397
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-09-14 14:33:09 +00:00
Philipp Hug ea81928e94 soc/sifive/fu540: Add driver for OTP memory
Provides minimal functionality to read the SOC s/n from the NeoFuse
one time programmable memory.

Change-Id: I14b010ad9958931e0a98a76f76090fd7c66f19a0
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/27435
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-09-10 15:05:11 +00:00
Angel Pons 8120759d90 Documentation/nb/intel/sandybridge/nri_registers.md: Fix mistake
According to a comment on fa1a07b, the 100MHz clock is the Ivy Bridge
only clock, not the 133MHz one.

Change-Id: I28fed4a9264b96f93b9e88325f547a5db512514c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28377
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-30 14:47:41 +00:00
Tom Hiller 3762e99893 Documentation: Normalize release note headings
Headings are used to populate release note TOC.

Change-Id: I39b018ed4498555044616a3aa660abe1047b5449
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/27720
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-08-28 15:09:36 +00:00
Tom Hiller 2436349a3b Documentation: fix release version linking
Correct links to coreboot release notes and fix related "document
isn't included in any toctree" warnings.

Change-Id: I6563da6f82f5686e54791331312434828c63f5a6
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/27719
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-08-28 15:09:19 +00:00
Tom Hiller 993869e3fc Documentation: Fix formatting
Fix formatting and missing close block quotes in nri_registers.md

Change-Id: I5fa0136f4d7f05737a0d53ff9da7d2c77b22d675
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/28327
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-08-27 16:53:06 +00:00
Tom Hiller c3e5dd4cd8 Documentation: Fix make rule for sphinx-autobuild
Execute sphinx-autobuild for livesphinx make rule

Change-Id: I725392f1f132101eede8fed75e8d225c972ad1fe
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/28326
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-08-27 16:52:46 +00:00
Angel Pons 58a7e397a1 util/ifdfake: Remove deprecated utility
Since ifdfake has been deprecated in favor of better alternatives, there
is no need to support it any further. Remove it from "util/", as well as
any leftover references in other files.

Change-Id: I45fe3d9fd606a61d5c3b9d0e6489a1df6d6510f0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-08-23 18:06:31 +00:00
Tom Hiller 651b11be2d Documentation: Add make rule for sphinx-autobuild
Add livesphinx to start sphinx-autobuild

Change-Id: I9eb3217e758c2c882c759fa7ae75a39aaf1a0358
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/28210
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-23 15:54:49 +00:00
Arthur Heymans eb2fc04c97 mb/foxconn/d41s: Add mainboard
This supports the Foxconn d41s, d42s, d51s, d52s.

The following is tested (SeaBIOS 1.12 + Linux 4.9) and works:
- COM1
- S3 resume (with SeaBIOS needs sercon disabled)
- Native graphic init on VGA output
- SATA
- USB
- Ethernet
- PS2 keyboard

The base for this mainboard port was the Intel D510MO port.

Change-Id: Ie4ec9cbf70adcdddbc2e5d805e4806825c320072
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28227
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-23 15:51:47 +00:00
Angel Pons fa1a07bf50 Documentation/northbridge/intel/sandybridge/*: fix typos
Fix some words' spelling and rename "Sandybridge" and "Ivybridge" in
text (not filepaths) to match Intel's names "Sandy Bridge" and "Ivy
Bridge".

Change-Id: Ic77126ccaf1d3ec5530a35d1a0f7d2ea5e174c9a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28231
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-08-22 07:03:13 +00:00
Stefan Tauner 6f9c84dc88 Documentation/gfx: explain port mapping in libgfxinit's config
Change-Id: Id24ded4ba641aade66468313e33ede1a82090f05
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/27854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-13 15:47:51 +00:00
Tristan Corrick 870f69e221 Documentation/Makefile.sphinx: Be cautious when running `rm -rf`
If BUILDDIR were an empty string, running `make clean` would result in
running `rm -rf /*`. Omitting the trailing /* prevents this.

With a valid BUILDDIR, the behaviour of `make clean` changes slightly in
that BUILDDIR itself is removed. However, this is probably more in line
with what one would expect from `make clean`.

Change-Id: I51b52bb6e7fe73a07fed6291a4f1cc253f2bf319
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/27775
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-13 15:37:32 +00:00
Patrick Rudolph 486df4612d Documentation: Add FIT payload documentation
Describe the new uImage.FIT loader.

Change-Id: I8b2060f2a63406669196bcbc190cc1511ae9fe94
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-08-08 23:49:38 +00:00