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1057 Commits

Author SHA1 Message Date
Jonathan McDowell 885b267594 Fixup the EPIA-M motherboard config to use the new VT8235 setup. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2001 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-08-08 08:14:34 +00:00
Jonathan McDowell 53365f511d Tidy + compile fixup VT8235 southbridge support. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-08-08 07:59:15 +00:00
Jonathan McDowell 8bb8970716 Fixup EPIA-M config file so it's actually parsable by buildtarget. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-08-08 07:52:20 +00:00
Stefan Reinauer ce8cba4d04 reclone ts5300 from digitallogic sc520 board 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-08-06 22:37:26 +00:00
arch import user (historical) cad91fdd79 more khepri cleanups. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-08-05 18:55:52 +00:00
arch import user (historical) 19ae9403c2 cleanup of khepri target 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-08-05 18:53:31 +00:00
arch import user (historical) 2bef9a960a small update 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-08-05 18:41:38 +00:00
arch import user (historical) 0de60ee334 remove description of obsolete, already dropped patch. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-08-05 18:34:33 +00:00
Li-Ta Lo 09952c1970 move x86 CAR related stuff to arch/i386/Config.lb 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-26 18:27:13 +00:00
Li-Ta Lo 1748bf28a7 Added IBM e326 support. VGA works too. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-26 16:39:42 +00:00
Greg Watson dd1505dae7 backed out 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-20 18:33:21 +00:00
Greg Watson 78e0b0edf4 Updated ep405pc to latest config system. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-20 18:28:12 +00:00
Yinghai Lu 304f24c2d2 missed cache_as_ram_auto.c 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-08 02:56:47 +00:00
Yinghai Lu 13f1c2af8b eric patch 
1. x86_setup_mtrr take address bit.
        2. generic ht, pcix, pcie beidge...
        3. scan bus and reset_bus
        4. ht read ctrl to decide if the ht chain
           is ready
        5. Intel e7520 and e7525 support
        6. new ich5r support
        7. intel sb 6300 support.

yhlu patch
	1. split x86_setup_mtrrs to fixed and var
	2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
	3. in_conherent.c K8_SCAN_PCI_BUS


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-08 02:49:49 +00:00
Li-Ta Lo 14cde9e96a add ibm e326 support, basically it is the same as e325 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1981 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-07 21:31:50 +00:00
arch import user (historical) fb07bf4aca Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-62 
Creator:  Yinghai Lu <yhlu@tyan.com>

add eswar code in intel car to disable Hyperthreading


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:43 +00:00
arch import user (historical) 59140ccdf3 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-61 
Creator:  Yinghai Lu <yhlu@tyan.com>

write_pirq_routing_table for x86


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:35 +00:00
arch import user (historical) 80e3d96d0a Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-60 
Creator:  Li-Ta Lo <ollie@lanl.gov>

More Via EPIA 

more via epia stuff, including the trival but fatal bug in auto.c


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1978 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:33 +00:00
arch import user (historical) f642a4795a Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-59 
Creator:  Li-Ta Lo <ollie@lanl.gov>

S4880 mainboard Config.lb

Comment in the Config.lb shoud be '#' rather than the C++ '//'.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:30 +00:00
arch import user (historical) b9a0e03a68 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-58 
Creator:  Li-Ta Lo <ollie@lanl.gov>

auto.c and failover.c

convert mainboard auto.c and failover.c to post DOM era


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1976 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:28 +00:00
arch import user (historical) a4b26d77e2 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-57 
Creator:  Li-Ta Lo <ollie@lanl.gov>

shit

put "use CONFIG_USE_INIT" in the global Config.lb


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:26 +00:00
arch import user (historical) 7dec0f9ac3 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-56 
Creator:  Yinghai Lu <yhlu@tyan.com>

remove junk in s2885 cache_as_ram_auto.c 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:06 +00:00
arch import user (historical) eec65a6938 cleanup due to failing tla-svn-sync 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1972 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:09:13 +00:00
arch import user (historical) 4d8620eecb Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-55 
Creator:  Yinghai Lu <yhlu@tyan.com>

intel car to x86 car


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:23:57 +00:00
arch import user (historical) 54d6b08f01 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-54 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:17:41 +00:00
arch import user (historical) 93cabf12d1 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-53 
Creator:  Yinghai Lu <yhlu@tyan.com>

more safe stack in ram for cache_as_ram


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:17:39 +00:00
arch import user (historical) c5d9e3b6dd Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-52 
Creator:  Yinghai Lu <yhlu@tyan.com>

USE_DCACHE_RAM instead of CONFIG_DCACHE_RAM in raminit.c 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:17:37 +00:00
arch import user (historical) 6ca7636c8f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51 
Creator:  Yinghai Lu <yhlu@tyan.com>

cache_as_ram for AMD and some intel


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:17:25 +00:00
arch import user (historical) b2ed53dd56 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-50 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>

This now boots to the point of passing the memory test in auto.c. But: we still don't have it working after the "Jumping to LinuxBIOS" step


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1966 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:23 +00:00
arch import user (historical) 69c79d232e Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-49 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>

this is a version that  does not fail, but memory is still not up


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1965 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:21 +00:00
arch import user (historical) 9a796d1ffb Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-48 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:19 +00:00
arch import user (historical) 897c78bd15 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-47 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1963 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:15 +00:00
arch import user (historical) 52871c4ad5 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-46 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>

sc520 fails after NOP


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:13 +00:00
arch import user (historical) c9e2af9ce6 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-45 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1961 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:11 +00:00
arch import user (historical) dc81118570 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-44 
Creator:  Li-Ta Lo <ollie@lanl.gov>

Correct VGA support

Make the VGA support for both VGA and no VGA cases.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:09 +00:00
arch import user (historical) 785b1b6e99 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-43 
Creator:  Li-Ta Lo <ollie@lanl.gov>

Cosmetic

Cosmetic code reformatting and message output


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:07 +00:00
arch import user (historical) fd0f828412 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-42 
Creator:  Li-Ta Lo <ollie@lanl.gov>

missing commit for emulator update

Which one is more stupid? TLA or me?


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1958 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:05 +00:00
arch import user (historical) 8fb9a5ae3b Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-41 
Creator:  Li-Ta Lo <ollie@lanl.gov>

Onboard VGA for HDAMA

Added onboard VGA support for Arima/HDAMA


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1957 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:03 +00:00
arch import user (historical) 6c9dbc1a04 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-40 
Creator:  Li-Ta Lo <ollie@lanl.gov>

ibm e325 

Bring imb e325 to post device object model era


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:16:00 +00:00
arch import user (historical) 34120d1b4f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-39 
Creator:  Li-Ta Lo <ollie@lanl.gov>

TLA sucks again

This is the third time I try to commit only the emulator changes.
I hope this patch contains the emulator changes only.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:15:57 +00:00
arch import user (historical) 1c8cd59f3c Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-38 
Creator:  Li-Ta Lo <ollie@lanl.gov>

emulator update

x96emu update from Paulo


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:15:54 +00:00
arch import user (historical) 7e5fbd6fc0 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-37 
Creator:  Li-Ta Lo <ollie@lanl.gov>
TLA is really diffcult to use. How am I going to
roll back my last commit ?


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:15:52 +00:00
arch import user (historical) acfaeceffd Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-36 
Creator:  Li-Ta Lo <ollie@lanl.gov>

emulator update

Correction to the reduce emulator from Paulo


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:15:48 +00:00
arch import user (historical) 9c3f37cb5f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-35 
Creator:  Yinghai Lu <yhlu@tyan.com>

s2881 dual core config


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:15:46 +00:00
arch import user (historical) ef03afa405 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34 
Creator:  Yinghai Lu <yhlu@tyan.com>

AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:15:30 +00:00
arch import user (historical) 014c3e185f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-33 
Creator:  Yinghai Lu <yhlu@tyan.com>

remove lsi/53c1030 in MB Config


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:14:10 +00:00
arch import user (historical) 056d6195d8 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-32 
Creator:  Yinghai Lu <yhlu@tyan.com>

set CK804 nic mac addr in MMIO instead of pci config


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:14:08 +00:00
arch import user (historical) a07e6ded1c Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-31 
Creator:  Yinghai Lu <yhlu@tyan.com>

nvidia onboard lan support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1947 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:14:06 +00:00
arch import user (historical) 98d0d30f6b Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-30 
Creator:  Yinghai Lu <yhlu@tyan.com>

Nvidia Ck804 support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:13:46 +00:00
arch import user (historical) 577f185d38 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-29 
Creator:  Hamish Guthrie <hamish@prodigi.ch>

Added NSC pc97317 super-io and added fill character option to config/Options.lb to speed up flash programming


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1945 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:11:02 +00:00
arch import user (historical) c46ce1373c Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-27 
Creator:  Hamish Guthrie <hamish@prodigi.ch>

Added GX1 cpu files


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:09:21 +00:00
arch import user (historical) d24d6993b6 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-26 
Creator:  Hamish Guthrie <hamish@prodigi.ch>

Added AMD GX1 northbridge and cs5530 Southbridge


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1942 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:06:46 +00:00
arch import user (historical) 4e83d70a43 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-25 
Creator:  Hamish Guthrie <hamish@prodigi.ch>

Adds a tree for the Eaglelion mainboard. This board has an AMD GX1 processor in a typical Mini-ATX format with a few ISA and PCI slots.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:04:01 +00:00
arch import user (historical) b47a4d3347 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-24 
Creator:  Yinghai Lu <yhlu@tyan.com>

AMD MB IDE enable in Config.lb 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:03:05 +00:00
arch import user (historical) 0b78ea7a28 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-23 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>

add in stepan's raminit code for the sc520


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:03:03 +00:00
arch import user (historical) 4a39e0b67c Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-22 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1938 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:03:01 +00:00
arch import user (historical) 708023cdea Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-19 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1935 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:00:18 +00:00
arch import user (historical) c8c720a801 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-16 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>

add cpu directory and files for sc520


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1934 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:59:18 +00:00
arch import user (historical) 613c72abc4 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-15 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:58:30 +00:00
arch import user (historical) 0a864f51a7 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-14 
Creator:  Ronald G. Minnich <rminnich@lanl.gov>

add console options to via/epia/Options.lb


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:58:28 +00:00
arch import user (historical) 9a2893fd9d Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-13 
Creator:  Li-Ta Lo <ollie@lanl.gov>

trival test commit

This is my first tla commit


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:58:26 +00:00
arch import user (historical) 2305364397 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-10 
Creator:  Yinghai Lu <yhlu@tyan.com>

pci_rom.h  smbus device parent device print


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:49:59 +00:00
arch import user (historical) ca0084ef9b Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-9 
Creator:  Yinghai Lu <yhlu@tyan.com>

rm tyan VERSION


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:49:56 +00:00
arch import user (historical) 0093e36d9b Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-8 
Creator:  Yinghai Lu <yhlu@tyan.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:49:54 +00:00
arch import user (historical) 72c3b053d8 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-7 
Creator:  Yinghai Lu <yhlu@tyan.com>

ide_enable in MB Config and jmp_auto ( it will make start in the 64k boundary) 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:49:52 +00:00
arch import user (historical) fd60674258 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-6 
Creator:  Stefan Reinauer <stepan@openbios.org>

fix dram initialization on island/aruma

Never trust the specs. :-) I messed the different
cpu numbering notations up before. This makes my
wrong 8x patch obsolete as well.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:49:50 +00:00
arch import user (historical) bc5be47919 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-4 
Creator:  Eric Biederman <ebiederman@lnxi.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:48:04 +00:00
arch import user (historical) 4966de81c3 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-3 
Creator:  Eric Biederman <ebiederman@lnxi.com>

Add read[bwl] write[bwl] to arch/io.h for i386

A pending patch requires needs this and ppc already has them
so it is a good idea to implement them :)

I don't know why this was not implemented earlier.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:48:02 +00:00
arch import user (historical) 3f8eb7a072 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-2 
Creator:  Eric Biederman <ebiederman@lnxi.com>

Bump the version number with the switch to arch

I need an arch test case so bumped the version number.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:48:00 +00:00
Li-Ta Lo 6c4c07d4b3 fixed a bug cause failure on some expensive VGA cards 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1918 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-03-04 22:08:55 +00:00
Li-Ta Lo be977a14d1 some comment in ACPI table 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1917 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-03-04 22:03:07 +00:00
Stefan Reinauer ef5c64cca5 simplify 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-13 22:42:14 +00:00
Yinghai Lu 1f9f34228a move apic before nb 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1915 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-09 17:34:55 +00:00
Stefan Reinauer 8ca78760c7 add cross compiling for abuild.sh 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-08 11:55:42 +00:00
Stefan Reinauer e943fdb178 * fix build without patches. 
* create vital ACPI information from the linuxbios device tree.
* pass linuxbios information into dsdt.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-08 09:35:19 +00:00
Stefan Reinauer df08a1d196 generous iteration on the device tree removed. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-08 09:29:19 +00:00
Stefan Reinauer e30042da3e fix comment 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-08 09:11:40 +00:00
Yinghai Lu 55ba88da9e *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-03 05:35:32 +00:00
Stefan Reinauer aabf7f93b3 make debugging a bit more useful 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-02 15:17:51 +00:00
Stefan Reinauer d4b24ceedb add patches that were rejected in discussion in case they are still needed 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-02 15:08:23 +00:00
Stefan Reinauer fc4dda703b new port: island aruma 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-02 15:03:37 +00:00
Yinghai Lu 4d909049bc 8 ways works now 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1904 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-02-01 01:22:57 +00:00
Yinghai Lu 6360187e9e spare one more mtrr 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-27 22:48:12 +00:00
Yinghai Lu 830435bb16 coherent.c don't need to read incoherent ht cap 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1902 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-27 18:38:10 +00:00
Yinghai Lu 90b3e09e63 comment out ht_setup_link 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-26 22:00:20 +00:00
Yinghai Lu ff8b96ec51 pre_d0 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-26 17:57:34 +00:00
Stefan Reinauer eb2b06bc3f target port may need to checksum 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1899 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-26 09:58:49 +00:00
Yinghai Lu 898061220b -Make 1, 2, 4, 6 installed cpu works. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-25 02:17:44 +00:00
Yinghai Lu 6a2798d28b move apic cluster before pci_domain in MB Config.lb 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1897 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-21 22:58:15 +00:00
Yinghai Lu b5d9af4105 move apic cluster before pci_domain in MB Config.lb 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-21 22:02:09 +00:00
Yinghai Lu e324731152 linkb_to_host 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-20 20:41:17 +00:00
Eric Biederman 3f5ef301a7 Fix typo in microcode header file include 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1894 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-20 18:37:00 +00:00
Li-Ta Lo d808849a2c removed unused code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-19 23:21:00 +00:00
Li-Ta Lo bec039cb93 minor reformat 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-19 23:19:26 +00:00
Li-Ta Lo af02157530 add config option for vga 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-19 20:38:09 +00:00
Yinghai Lu 3d60688516 linkb_to_host 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-19 18:09:58 +00:00
Stefan Reinauer 3b809cb830 universal acpi fixes. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1888 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-19 14:13:02 +00:00
Stefan Reinauer dd1a959cb2 more universal acpi code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-19 14:12:02 +00:00
Stefan Reinauer 777224c7cf - make acpi usable for more than one motherboard. 
- make pirq normal debug a little bit nicer


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-19 14:06:41 +00:00
Yinghai Lu 26b2922f1c linkb_to_host 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-19 01:21:05 +00:00
Stefan Reinauer 4ea158b285 this is obsolete. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-18 13:26:34 +00:00
Yinghai Lu 54ab3115e3 class code reverse 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-18 03:10:46 +00:00
Yinghai Lu 328852d243 fix reboot broken 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-17 23:47:55 +00:00
Yinghai Lu 1f1085b433 linkb_to_host and addon display card override onboard card. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-17 21:37:12 +00:00
Yinghai Lu c507e4de73 linkb_to_host 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-17 21:32:36 +00:00
Yinghai Lu 1d6b46060c can not enable cache for ram in auto.c 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-15 04:12:27 +00:00
Stefan Reinauer e562738f8c add vga.h / needed by vga text console. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-15 00:29:10 +00:00
Yinghai Lu 9e4faef7db CONFIG_PCI_ROM_RUN 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-14 22:04:49 +00:00
Yinghai Lu 688238a50c CONFIG_PCI_ROM_RUN 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-14 21:54:16 +00:00
Yinghai Lu 8e51b8a372 amd version mtrr early 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-14 19:26:52 +00:00
Yinghai Lu 24f542f478 onboard pci_rom second run 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-14 17:17:55 +00:00
Yinghai Lu bcde1618da onboard pci_rom disable onboard 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-14 05:34:09 +00:00
Yinghai Lu d57e756065 onboard pci_rom finally done 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-14 02:59:24 +00:00
Yinghai Lu e1f7c7fe0d ht opt bug 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 21:37:29 +00:00
Yinghai Lu 4a1222d50c lift apic id fix 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 19:23:24 +00:00
Yinghai Lu c7870ace39 onboard pci_onboard works 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 19:14:52 +00:00
Stefan Reinauer e74f91a901 cosmetics. \n is enough here. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 18:58:41 +00:00
Yinghai Lu 6308d58c92 onboard pci_rom 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 18:42:22 +00:00
Li-Ta Lo d8ad7df700 fixed a logic bug 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 05:51:48 +00:00
Li-Ta Lo bc5399aa6e better embedded ROM support, done blindly 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 05:44:16 +00:00
Li-Ta Lo 75f5b559e6 remove #include chip.h 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 05:21:27 +00:00
Yinghai Lu 214ea8a9df onboard pci_rom 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 03:50:18 +00:00
Yinghai Lu 77cbb99a57 onboard pci_rom 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-13 03:36:38 +00:00
Yinghai Lu c47eeb2cec onboard pci rom 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-12 23:58:49 +00:00
Yinghai Lu 7715f26590 onboard pci rom 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-12 23:52:07 +00:00
Li-Ta Lo 515f6c729e works for PCI vga cards too 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-11 22:48:54 +00:00
Li-Ta Lo 51990b350a removed validation code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-11 16:35:56 +00:00
Li-Ta Lo 5ce1590355 fixed abs() impelmentation 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-11 16:33:31 +00:00
Li-Ta Lo 883b8793c9 added PCI expansion ROM support, 
works for some ATI and Nvidia AGP cards now.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-10 23:16:22 +00:00
Yinghai Lu 7ee97999ad nodeid 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-10 22:27:47 +00:00
Yinghai Lu 3a23863a3a nodeid 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-10 22:20:51 +00:00
Yinghai Lu 20a2a57092 no siblings yet 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1848 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-10 19:20:38 +00:00
Yinghai Lu 0fe9902b50 enable apic ext id to keep bsp using apid 0 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1847 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-07 21:15:39 +00:00
Yinghai Lu 90a04ee5a9 enable apic ext id to keep bsp using 0 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1846 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-07 21:12:05 +00:00
Li-Ta Lo 31ce35e8ab remove ti_firewire.c, it only enable the bus master 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-07 04:50:33 +00:00
Li-Ta Lo 84a8028349 fixed indentation 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-07 02:42:53 +00:00
Yinghai Lu 953e0f6afe add NC support to spare mtrrs for 64G memory stored 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-06 04:55:19 +00:00
Yinghai Lu 1bc5654957 clear dead link bug fix and opt_link_read for non coherent link 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-06 02:23:31 +00:00
Stefan Reinauer c6068ec9ef compile fix 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-05 21:13:09 +00:00
Yinghai Lu cb1255ead2 enable apic ext id 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1840 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-05 20:57:33 +00:00
Yinghai Lu 23202a9870 enable apic ext id 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-05 20:29:05 +00:00
Yinghai Lu a335402bec serialize cpus for >2 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1837 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-03 20:54:43 +00:00
Yinghai Lu e089f00ad4 optimize read link bug fixed. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1836 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-03 20:00:36 +00:00
Yinghai Lu bf0ed60514 Dynamic RT with 4 ways test OK. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-03 19:54:47 +00:00
Li-Ta Lo 85e76c6af6 now rom_address is one of the resources 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1834 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-27 17:53:45 +00:00
Li-Ta Lo e7c26a70ec remove unused options 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-27 17:52:54 +00:00
Li-Ta Lo af0cc3e1c4 start consolidate various borken vga support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1832 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-27 17:52:05 +00:00
Li-Ta Lo e8b1c9dbd1 clean up VGA and Expansion ROM support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-27 04:25:41 +00:00
Yinghai Lu 5b772cca55 default link bug fix 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-24 04:42:59 +00:00
Li-Ta Lo 9a5b4962a7 Allocating resource for Expansion ROM 
More correct resource allocation for legacy VGA on K8


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-23 21:48:01 +00:00
Yinghai Lu a804a713a2 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-22 19:02:41 +00:00
Yinghai Lu e2b2006406 update broastcast table for K8 4p above 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1827 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-22 03:14:50 +00:00
Yinghai Lu 6a5d99bde4 8 ways support changes 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1826 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-22 00:58:50 +00:00
Yinghai Lu 1de80941c2 amd k8 routing table creation dynamically support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1825 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-21 22:14:12 +00:00
Yinghai Lu 2c956bbc19 non coherent ht chain setup automatically 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1824 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-17 21:08:16 +00:00
Yinghai Lu 970990800e btext fix 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-16 02:44:25 +00:00
Stefan Reinauer 42b37443ac shame on me. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-15 16:09:06 +00:00
Stefan Reinauer b14e851110 obviously broken 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1820 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-15 16:08:18 +00:00
Yinghai Lu 140a3a11ad add dump_pci_devices_in_bus 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1819 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-14 01:56:55 +00:00
Eric Biederman ec01aa98d0 - Fix the definition of the linuxbios table so all of the compilers 
will generate the struct lb_memory_range the same.
- Add a few pci_ids.
- Small readabiltiy clean ups to debug_dev


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1818 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-10 20:50:43 +00:00
Stefan Reinauer 6ac60f8dfe get config tool satisfied.. let's see if we get this working.. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1816 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-09 00:37:03 +00:00
Li-Ta Lo 3a81285409 allocating resource for legacy VGA frame buffer, it is not 100% 
correct but it works anyway.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1811 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-03 22:39:34 +00:00
Yinghai Lu 845e8df673 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-03 19:07:45 +00:00
Yinghai Lu 7213d0f513 i2c mux support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-03 03:39:04 +00:00
Mark Wilkinson 57b6786168 Updates to raminit.c correcting for new version of smbus_read_byte. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-01 16:59:05 +00:00
Mark Wilkinson e1bc97b078 Updated version of vt8231_early_smbus.c 
smbus_read_byte routine updated as per suggestion by rgm
  addition reset & wait_until_ready to allow correct reading of first
  byte on epia systems.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1807 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-01 16:57:37 +00:00
Ronald G. Minnich 284c27f299 fixes to make adl855pc compile. 
fixes to emulator.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1806 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-28 04:39:45 +00:00
Greg Watson 637b699865 new config file format - PMC no longer works 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1805 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-26 01:11:31 +00:00
Greg Watson 5720da9d75 moved from ../sandpointx3_altimus_mpc7410 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1804 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-26 01:11:03 +00:00
Greg Watson 31f6606aea not used here 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-26 01:09:49 +00:00
Greg Watson 08d2d5a5c2 PMC no longer works 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1802 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-26 01:08:16 +00:00
Greg Watson d12eca7273 ../sandpoint contains X3 configuration 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1801 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-26 01:07:47 +00:00
Greg Watson 92555b939d make sure enable_resource called on children 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-26 00:46:39 +00:00
Li-Ta Lo 0493069aa9 update comment according to the new DOM 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1799 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-25 17:37:19 +00:00
Li-Ta Lo f0ee1efcaf marked debug device on LPC bus 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1798 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-25 17:35:37 +00:00
Greg Watson d62a09c791 move pnp code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-24 21:15:49 +00:00
Greg Watson d47d05bd0a pci devices are all on the same bus 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-24 21:14:06 +00:00
Greg Watson fb746a3fea removed argument 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-24 21:13:03 +00:00
Greg Watson 0bac237334 added comments 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-24 21:12:20 +00:00
Greg Watson f439250355 fixup debugging info 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-24 21:11:04 +00:00
Greg Watson c906c2918a scan the static bus 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-24 21:09:08 +00:00
Greg Watson e5c0ca30a2 pci_read using wrong device 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-22 21:36:46 +00:00
Eric Biederman 5697edee03 - Add the new files for the motorola mpc107 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-18 22:39:43 +00:00
Eric Biederman a9e632c2ac - First stab at getting the ppc ports building and working. 
- The sandpointx3+altimus has been consolidated into one directory for now.
- Added support for having different versions of the pci access functions
  on a per bus basis if needed.
  Hopefully I have not broken something inadvertently.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-18 22:38:08 +00:00
Eric Biederman bec8acedf1 - Comment on why optimize_link_read_pointers is safe on an Athlon64 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-15 17:01:05 +00:00
Eric Biederman cb364958a0 - Don't force spew level debug messages on the kherpi 
- optimize_link_read_pointers compiles now on the solo so don't disable it.
- Start sorting out the confusion between and object and an initobject on the ppc ports
- Major bugfix release of romcc to support to remove preprocessor deficiencies.
  The line and column numbers are computed are now correct.  But watch out
  the error messages sometimes report the location of the next token so things
  are still a little skewed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-15 10:46:44 +00:00
Eric Biederman f6f349828f - Allow coherent_ht.c to compile uniprocessor 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-13 03:47:52 +00:00
Stefan Reinauer 3e9b52d554 ooops. sorry 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1782 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-12 21:00:29 +00:00
Stefan Reinauer 204f718fa3 fix a little more of ppc 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-11 21:30:50 +00:00
Ronald G. Minnich 8d41ad83be in loglevel.h, if ASM_CONSOLE_LOGLEVEL is defined, don't try to set it. 
Set adl855pc ROM_SIZE to 1M
Other minor debug prints until we get this fixed.

We're almost as far along as we were before the Change :-)


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1780 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-11 14:04:25 +00:00
Eric Biederman 029517c77a - Refactor the pc keyboard code so it will timeout if the hardware 
is not working instead of haning forever.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-11 11:56:00 +00:00
Eric Biederman 69afe2822a mpspec.h: Tweak the write_smp_table macro so that it is safe if passed a complex expression. 
crt0.S.lb: Modified so that it is safe to include console.inc
console.c:  Added print_debug_ and frieds which are non inline variants of the normal console functions
div64.h:   Only include limits.h if  ULONG_MAX is not defined and define ULONG_MAX on ppc
socket_754/Config.lb Conditionally set config chip.h
socket_940.c We don't need and #if CONFIG_CHIP_NAME we won't be linked in if there are no references.
slot_2/chip.h: The operations struct need to be spelled cpu_intelt_slot_2_ops
slot_2/slot2.c: The same spelling fix
socket_mPGA603/chip.h: again
socket_mPGA603/socket_mPGA603_400Mhz.c: and again
socket_mPGA604_533Mhz/Config.lb: Conditionally defing CONFIG_CHIP_NAME
socket_mPGA604_800Mhz/chip.h: Another spelling fix
socket_mPGA604_800Mhz.c     and again
via/model_centaur/model_centaur_init.c: It's not an intel CPU so don't worry about Intel microcode uptdates
earlymtrr.c:  Remove work around for older versions of romcc
pci_ids.h:  More ids.
malloc.c:   We don't need string.h any longer
uart8250.c: Be consistent when delcaring functions static inline
arima/hdama/mptable.c: Cleanup to be a little more consistent
amdk8/coherent_ht.c:
 - Talk about nodes not cpus (In preparation for dual cores)
 - Remove clear_temp_row (as it is no longer needed)
 - Demoted the failure messages to spew.
 - Modified to gracefully handle failure (It should work now if cpus are removed)
 - Handle the non-SMP case in verify_mp_capabilities
 - Add clear_dead_routes which replaces clear_temp_row and does more
 - Reorganize setup_coherent_ht_domain to cleanly handle failure.
 - incoherent_ht.c: Clean up the indenation a little.
i8259.c: remove blank lines at the start of the file.
keyboard.c: Make pc_keyboard_init static
ramtest.c: Add a print out limiter, and cleanup the printout a little.
amd8111/Config.lb: Mention amd8111_smbus.c
amd8111_usb.c: Call the structure usb_ops not smbus_ops.
NSC/pc97307/chip.h: Fix spelling issue
pc97307/superio.c: Use &ops no &pnp_ops.
w83627hf/suerio.c: ditto
w83627thf/suerio.c: ditto
buildrom.c: Use braces around the body of a for loop.  It's more maintainable.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-11 06:53:24 +00:00
Eric Biederman 8d54bd4471 - Remove include of device/chip.h 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-11 03:31:16 +00:00
Eric Biederman 624252450f - Delete unused funciton realloc 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-10 20:13:35 +00:00
Eric Biederman 26e32760f9 - Remove unused start_stop.h 
This file died with the last round of cpu restructuring I just missed it earlier.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-10 20:11:15 +00:00
Eric Biederman 8bcb8a2ada - Don't use e7501 root_complex 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1774 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-10 18:32:20 +00:00
Eric Biederman ab49946a56 - Remove e7501 root_complex 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-10 18:31:31 +00:00
Ronald G. Minnich 52c2277a1b adl855pc support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1772 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-10 15:12:48 +00:00
Yinghai Lu 12eb7bc5ad *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-08 21:16:16 +00:00
Yinghai Lu ad00d73998 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 22:14:33 +00:00
Yinghai Lu 44b34e31a5 CONFIG_CHIP_NAME to control config chip.h without .name 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 22:03:37 +00:00
Eric Biederman 7a9c836f93 - How did I forget to cvs add this? 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1763 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 19:55:46 +00:00
Eric Biederman 692f2c7aed - First pass at getting the powerpc ports to compile 
The static device tree is not built properly at all yet, but at least we get through it.
  FIXME (What is the proper way to handle add in boards?)
- Add generic div64 support and ppc div64 support
- Fix abuild so it properly generates the CC line when cross compiling.
- Add one more possible ppc cross compiler target


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 19:55:06 +00:00
Yinghai Lu cd51e6ad90 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1761 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 18:09:46 +00:00
Eric Biederman 709850a21b - Ensure every copy of Options.lb uses: 
CROSS_COMPILE
  CC
  HOSTCC
  OBJCOPY


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 10:48:04 +00:00
Eric Biederman 41d0fa38af - Modify all of the Opteron motherboards to have a separate logical 
chip for the amdk8/root_complex


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 07:26:56 +00:00
Eric Biederman 8bd555297e - Add a new chip northbridge/amd/amdk8/root_complex 
- Moving the functionality around in northbridge/amd/amdk8/northbridge.c
  to put the pci_domain and the apic bus on the root_complex.
  Everything else remains with the individual northbridges.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1749 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 07:04:54 +00:00
Yinghai Lu 7bf1b48bd4 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1748 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 03:44:01 +00:00
Li-Ta Lo 9562049df5 reformat 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1745 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 23:42:54 +00:00
Yinghai Lu b2d77282e0 debug device added 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1744 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 22:36:18 +00:00
Li-Ta Lo 652ae6f533 we decide not to enable BM DAM form them 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1743 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 21:48:39 +00:00
Yinghai Lu 8085f032f8 SI Class code check 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 21:00:13 +00:00
Li-Ta Lo 2d2bdd3846 removed #if 0 #endif code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1741 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 20:31:04 +00:00
Li-Ta Lo f84926efca tell people that the segment descriptors are different for ROMCC and 
GCC code.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1740 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 18:36:06 +00:00
Li-Ta Lo 1995f1af35 removed the comment in the very beginning of hardwaremain(). I don't 
think it is relevant now.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1739 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 18:33:33 +00:00
Eric Biederman 23bc47db17 Add Options.lb to various motherboard ports 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1738 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 11:09:12 +00:00
Eric Biederman 018d8dd60f - Update abuild.sh so it will rebuild successfull builds 
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
  enabled.  All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 11:04:33 +00:00
Yinghai Lu 4403f60823 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-03 00:47:40 +00:00
Stefan Reinauer e507c85fe3 This hurts more than it helps. byebye 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1735 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-03 00:10:15 +00:00
Stefan Reinauer e4932dc760 get qemu-i386 target building again 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1734 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 20:33:12 +00:00
Yinghai Lu bf8bb42d6a *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1732 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 18:05:22 +00:00
Yinghai Lu 3974363f09 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 17:46:43 +00:00
Yinghai Lu 9434c1b661 Tyan update for ROM_IMAGE_SIZE > 64K 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 02:34:28 +00:00
Stefan Reinauer 0979969732 fix solo 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1729 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-31 23:03:10 +00:00
Eric Biederman 432aa6a255 - Update console.c to have non-inline versions of functions 
- Add exception.c
  Sorry for not including these ealier.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1728 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-30 22:59:35 +00:00
Eric Biederman f8a2dddb57 - To reduce confuse rename the parts of linuxbios bios that run from 
ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
- Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
- ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
- Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
- Start using romcc's built in preprocessor (This will simplify header compiler checks)
- Add helper functions for examining all of the resources
- Remove debug strings from chip.h
- Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
- Add the ability to catch exceptions on x86
- Add gdb_stub support to x86
- Removed old cpu options
- Added an option so we can detect movnti support
- Remove some duplicate definitions from pci_ids.h
- Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
- Minor romcc bug fixes


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-30 08:05:41 +00:00
Mark Wilkinson 0afcba7a3d Changes to allow Via/Epia code to be compiled after recent code changes. 
New Files :-
	src/cpu/via/model_centaur/Config.lb
	src/cpu/via/model_centaur/model_centaur_init.c

Updated Files :-
	src/arch/i386/include/arch/smp/mpspec.h
		- make write_smp_table a define for non smp systems
	src/cpu/x86/lapic/lapic_cpu_init.c
		- change possible typo
	src/mainboard/via/epia/Config.lb
	src/mainboard/via/epia/Options.lb

	src/mainboard/via/epia/auto.c
	src/mainboard/via/epia/chip.h
	src/mainboard/via/epia/failover.c
		- updated after recent code changes
	src/northbridge/via/vt8601/chip.h
	src/northbridge/via/vt8601/northbridge.c
	src/northbridge/via/vt8601/raminit.c
		- corrections after recent code changes to allow compiling
	src/southbridge/via/vt8231/chip.h
	src/southbridge/via/vt8231/vt8231.c
		- initial pass to allow compiling after recent code changes.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-29 16:16:43 +00:00
Yinghai Lu 97035448f3 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1725 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-28 18:44:38 +00:00
Eric Biederman 79186eaecd - Look for all 8 possible cpus 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1724 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 18:54:13 +00:00
Stefan Reinauer a58cd524fb some more porting to the merge 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1723 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 17:27:10 +00:00
Eric Biederman 6e53f50082 sizeram removal/conversion. 
- mem.h and sizeram.h and all includes killed because the are no longer needed.
- linuxbios_table.c updated to directly look at the device tree for occupied memory areas.
- first very incomplete stab a converting the ppc code to work with the dynamic device tree
- Ignore resources before we have read them from devices, (if the device is disabled ignore it's resources).
- First stab at Pentium-M support
- add part/init_timer.h making init_timer conditional until there is a better way of handling it.
- Converted all of the x86 sizeram to northbridge set_resources functions.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 08:53:57 +00:00
Yinghai Lu 20fc678d65 spare 4s for restart 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1721 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 02:12:22 +00:00
Eric Biederman 63f2f721b4 - kill the broken and duplicate 855pm directory. Hopefully I have kept 
the least broken one.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1720 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 01:58:26 +00:00
Eric Biederman dfde9bb649 - Actually enable the Pentium-M cpus 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1719 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 01:18:47 +00:00
Eric Biederman 3566b3d545 - Bug fixes to the P-III support 
- Initial Pentium-M support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 01:18:16 +00:00
Yinghai Lu eefdb03898 S2885 winbond Superio all resource set 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 00:37:30 +00:00
Yinghai Lu fb198640d8 ops and tsc 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1716 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 19:55:30 +00:00
Yinghai Lu 9cf950ca5a s2735 minor changes 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1715 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 19:49:50 +00:00
Ronald G. Minnich 3f637906c4 added file 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1714 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 16:01:30 +00:00
Ronald G. Minnich 7ae74b40bf from Mark Wilkinson, some fixes. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 14:57:24 +00:00
Eric Biederman 8e2847c28e - For now use port 0x80 based delays in for the e7501 memory initialization. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 03:00:02 +00:00
Eric Biederman 60216355d2 - With Xeon cpus it seems best to use the tsc calibrated with timer2 as 
the time source.  The apic timer also has a variable time base.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 02:47:13 +00:00
Eric Biederman 720a8f57ef - Update e7501 northbridge.c to work in the new structure. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1710 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 02:32:23 +00:00
Yinghai Lu 8abb054c0e *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 00:05:22 +00:00
Yinghai Lu 2560dbdd50 for S2735 support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 21:33:08 +00:00
Yinghai Lu e99433157b *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1707 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 21:03:26 +00:00
Yinghai Lu 79cf1be9e4 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1706 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 18:49:09 +00:00
Yinghai Lu ccf0bc01aa s2735 half update 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 18:45:36 +00:00
Eric Biederman a1653cfea5 - Better memory I/O space distinguishing in amd_mtrr.c 
This is way to much code duplication but for now things work.
- Fix the typo in amd8111_lpc.c
- Remove an unused macro, use continue instead of break in mtrr.c


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1704 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 04:41:53 +00:00
Eric Biederman 4f9265fdc6 - kill typo so resources are not mixed up in amdk8/northbridge.c 
- Enable resources on the lpc bus.  PCI now longer do this by
  default for their children unless they are bridges.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1703 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 02:33:51 +00:00