69afe2822a
mpspec.h: Tweak the write_smp_table macro so that it is safe if passed a complex expression.
...
crt0.S.lb: Modified so that it is safe to include console.inc
console.c: Added print_debug_ and frieds which are non inline variants of the normal console functions
div64.h: Only include limits.h if ULONG_MAX is not defined and define ULONG_MAX on ppc
socket_754/Config.lb Conditionally set config chip.h
socket_940.c We don't need and #if CONFIG_CHIP_NAME we won't be linked in if there are no references.
slot_2/chip.h: The operations struct need to be spelled cpu_intelt_slot_2_ops
slot_2/slot2.c: The same spelling fix
socket_mPGA603/chip.h: again
socket_mPGA603/socket_mPGA603_400Mhz.c: and again
socket_mPGA604_533Mhz/Config.lb: Conditionally defing CONFIG_CHIP_NAME
socket_mPGA604_800Mhz/chip.h: Another spelling fix
socket_mPGA604_800Mhz.c and again
via/model_centaur/model_centaur_init.c: It's not an intel CPU so don't worry about Intel microcode uptdates
earlymtrr.c: Remove work around for older versions of romcc
pci_ids.h: More ids.
malloc.c: We don't need string.h any longer
uart8250.c: Be consistent when delcaring functions static inline
arima/hdama/mptable.c: Cleanup to be a little more consistent
amdk8/coherent_ht.c:
- Talk about nodes not cpus (In preparation for dual cores)
- Remove clear_temp_row (as it is no longer needed)
- Demoted the failure messages to spew.
- Modified to gracefully handle failure (It should work now if cpus are removed)
- Handle the non-SMP case in verify_mp_capabilities
- Add clear_dead_routes which replaces clear_temp_row and does more
- Reorganize setup_coherent_ht_domain to cleanly handle failure.
- incoherent_ht.c: Clean up the indenation a little.
i8259.c: remove blank lines at the start of the file.
keyboard.c: Make pc_keyboard_init static
ramtest.c: Add a print out limiter, and cleanup the printout a little.
amd8111/Config.lb: Mention amd8111_smbus.c
amd8111_usb.c: Call the structure usb_ops not smbus_ops.
NSC/pc97307/chip.h: Fix spelling issue
pc97307/superio.c: Use &ops no &pnp_ops.
w83627hf/suerio.c: ditto
w83627thf/suerio.c: ditto
buildrom.c: Use braces around the body of a for loop. It's more maintainable.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-11 06:53:24 +00:00
8d54bd4471
- Remove include of device/chip.h
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-11 03:31:16 +00:00
624252450f
- Delete unused funciton realloc
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-10 20:13:35 +00:00
26e32760f9
- Remove unused start_stop.h
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This file died with the last round of cpu restructuring I just missed it earlier.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-10 20:11:15 +00:00
8bcb8a2ada
- Don't use e7501 root_complex
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1774 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-10 18:32:20 +00:00
ab49946a56
- Remove e7501 root_complex
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-10 18:31:31 +00:00
52c2277a1b
adl855pc support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1772 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-10 15:12:48 +00:00
12eb7bc5ad
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-08 21:16:16 +00:00
ad00d73998
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05 22:14:33 +00:00
44b34e31a5
CONFIG_CHIP_NAME to control config chip.h without .name
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05 22:03:37 +00:00
7a9c836f93
- How did I forget to cvs add this?
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1763 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05 19:55:46 +00:00
692f2c7aed
- First pass at getting the powerpc ports to compile
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The static device tree is not built properly at all yet, but at least we get through it.
FIXME (What is the proper way to handle add in boards?)
- Add generic div64 support and ppc div64 support
- Fix abuild so it properly generates the CC line when cross compiling.
- Add one more possible ppc cross compiler target
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05 19:55:06 +00:00
cd51e6ad90
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1761 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05 18:09:46 +00:00
709850a21b
- Ensure every copy of Options.lb uses:
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CROSS_COMPILE
CC
HOSTCC
OBJCOPY
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05 10:48:04 +00:00
41d0fa38af
- Modify all of the Opteron motherboards to have a separate logical
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chip for the amdk8/root_complex
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05 07:26:56 +00:00
8bd555297e
- Add a new chip northbridge/amd/amdk8/root_complex
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- Moving the functionality around in northbridge/amd/amdk8/northbridge.c
to put the pci_domain and the apic bus on the root_complex.
Everything else remains with the individual northbridges.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1749 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05 07:04:54 +00:00
7bf1b48bd4
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1748 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05 03:44:01 +00:00
9562049df5
reformat
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1745 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 23:42:54 +00:00
b2d77282e0
debug device added
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1744 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 22:36:18 +00:00
652ae6f533
we decide not to enable BM DAM form them
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1743 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 21:48:39 +00:00
8085f032f8
SI Class code check
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 21:00:13 +00:00
2d2bdd3846
removed #if 0 #endif code
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1741 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 20:31:04 +00:00
f84926efca
tell people that the segment descriptors are different for ROMCC and
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GCC code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1740 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 18:36:06 +00:00
1995f1af35
removed the comment in the very beginning of hardwaremain(). I don't
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think it is relevant now.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1739 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 18:33:33 +00:00
23bc47db17
Add Options.lb to various motherboard ports
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1738 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 11:09:12 +00:00
018d8dd60f
- Update abuild.sh so it will rebuild successfull builds
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- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
enabled. All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 11:04:33 +00:00
4403f60823
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-03 00:47:40 +00:00
e507c85fe3
This hurts more than it helps. byebye
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1735 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-03 00:10:15 +00:00
e4932dc760
get qemu-i386 target building again
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1734 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-02 20:33:12 +00:00
bf8bb42d6a
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1732 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-02 18:05:22 +00:00
3974363f09
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-02 17:46:43 +00:00
9434c1b661
Tyan update for ROM_IMAGE_SIZE > 64K
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-02 02:34:28 +00:00
0979969732
fix solo
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1729 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-31 23:03:10 +00:00
432aa6a255
- Update console.c to have non-inline versions of functions
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- Add exception.c
Sorry for not including these ealier.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1728 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-30 22:59:35 +00:00
f8a2dddb57
- To reduce confuse rename the parts of linuxbios bios that run from
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ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
- Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
- ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
- Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
- Start using romcc's built in preprocessor (This will simplify header compiler checks)
- Add helper functions for examining all of the resources
- Remove debug strings from chip.h
- Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
- Add the ability to catch exceptions on x86
- Add gdb_stub support to x86
- Removed old cpu options
- Added an option so we can detect movnti support
- Remove some duplicate definitions from pci_ids.h
- Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
- Minor romcc bug fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-30 08:05:41 +00:00
0afcba7a3d
Changes to allow Via/Epia code to be compiled after recent code changes.
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New Files :-
src/cpu/via/model_centaur/Config.lb
src/cpu/via/model_centaur/model_centaur_init.c
Updated Files :-
src/arch/i386/include/arch/smp/mpspec.h
- make write_smp_table a define for non smp systems
src/cpu/x86/lapic/lapic_cpu_init.c
- change possible typo
src/mainboard/via/epia/Config.lb
src/mainboard/via/epia/Options.lb
src/mainboard/via/epia/auto.c
src/mainboard/via/epia/chip.h
src/mainboard/via/epia/failover.c
- updated after recent code changes
src/northbridge/via/vt8601/chip.h
src/northbridge/via/vt8601/northbridge.c
src/northbridge/via/vt8601/raminit.c
- corrections after recent code changes to allow compiling
src/southbridge/via/vt8231/chip.h
src/southbridge/via/vt8231/vt8231.c
- initial pass to allow compiling after recent code changes.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-29 16:16:43 +00:00
97035448f3
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1725 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-28 18:44:38 +00:00
79186eaecd
- Look for all 8 possible cpus
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1724 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27 18:54:13 +00:00
a58cd524fb
some more porting to the merge
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1723 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27 17:27:10 +00:00
6e53f50082
sizeram removal/conversion.
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- mem.h and sizeram.h and all includes killed because the are no longer needed.
- linuxbios_table.c updated to directly look at the device tree for occupied memory areas.
- first very incomplete stab a converting the ppc code to work with the dynamic device tree
- Ignore resources before we have read them from devices, (if the device is disabled ignore it's resources).
- First stab at Pentium-M support
- add part/init_timer.h making init_timer conditional until there is a better way of handling it.
- Converted all of the x86 sizeram to northbridge set_resources functions.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27 08:53:57 +00:00
20fc678d65
spare 4s for restart
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1721 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27 02:12:22 +00:00
63f2f721b4
- kill the broken and duplicate 855pm directory. Hopefully I have kept
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the least broken one.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1720 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27 01:58:26 +00:00
dfde9bb649
- Actually enable the Pentium-M cpus
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1719 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27 01:18:47 +00:00
3566b3d545
- Bug fixes to the P-III support
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- Initial Pentium-M support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27 01:18:16 +00:00
eefdb03898
S2885 winbond Superio all resource set
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27 00:37:30 +00:00
fb198640d8
ops and tsc
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1716 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-25 19:55:30 +00:00
9cf950ca5a
s2735 minor changes
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1715 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-25 19:49:50 +00:00
3f637906c4
added file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1714 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-25 16:01:30 +00:00
7ae74b40bf
from Mark Wilkinson, some fixes.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-25 14:57:24 +00:00
8e2847c28e
- For now use port 0x80 based delays in for the e7501 memory initialization.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23 03:00:02 +00:00
60216355d2
- With Xeon cpus it seems best to use the tsc calibrated with timer2 as
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the time source. The apic timer also has a variable time base.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23 02:47:13 +00:00
720a8f57ef
- Update e7501 northbridge.c to work in the new structure.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1710 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23 02:32:23 +00:00
8abb054c0e
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23 00:05:22 +00:00
2560dbdd50
for S2735 support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-22 21:33:08 +00:00
e99433157b
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1707 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-22 21:03:26 +00:00
79cf1be9e4
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1706 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-22 18:49:09 +00:00
ccf0bc01aa
s2735 half update
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-22 18:45:36 +00:00
a1653cfea5
- Better memory I/O space distinguishing in amd_mtrr.c
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This is way to much code duplication but for now things work.
- Fix the typo in amd8111_lpc.c
- Remove an unused macro, use continue instead of break in mtrr.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1704 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-22 04:41:53 +00:00
4f9265fdc6
- kill typo so resources are not mixed up in amdk8/northbridge.c
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- Enable resources on the lpc bus. PCI now longer do this by
default for their children unless they are bridges.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1703 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-22 02:33:51 +00:00
584e078231
adapt config files
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21 20:52:53 +00:00
800a55bb5c
get solo building after last infrastructure changes
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1700 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21 18:51:13 +00:00
a49f4161f5
update failover handling of some amd64 boards
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21 17:06:49 +00:00
dbec2d4090
- Bump the LinuxBIOS major version
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- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21 10:44:08 +00:00
f3aa4707d3
- Explicitly disable the fixed dram extensions bits.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1697 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21 02:53:25 +00:00
29490a17ce
- We already know the cache is disabled so don't bother disabling it.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1696 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21 02:43:15 +00:00
f19e2c766a
better support enable_dev for amd8111
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1695 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21 01:52:21 +00:00
6014983bab
add Option.lb
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1694 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-20 17:54:01 +00:00
6a61d6a4ae
Tyan update to work with new CPU Config
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-20 05:07:16 +00:00
abed01d81d
- Fix typo with reversing memory resources.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1692 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-19 23:35:53 +00:00
812688bf3c
change struct chip* to struct device*
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1691 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-19 17:49:32 +00:00
de24e61df7
- add support for socket 754
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- fix configuration creation for amd solo (doesn't compile yet)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1690 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-19 10:30:32 +00:00
a172d98233
- Fix bug with > 4GB of memory where PAE was left enabled.
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Why didn't this show up until I had > 4GB on one cpu?
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1688 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-19 05:07:18 +00:00
04da1d35d1
- Bump MAX_LINKS to 4 I have actually found an i2c bridge that needs this
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- Fix the hdama Config.lb to not longer use the link keywords oops,
and instead to have it nest everything properly.
- Update config.g to not support the link keyword
- update config.g to not support northbridge/southbridge/cpu/pmc noise words
we can just use chip now.
- Remove old link handling from the code
- Detect and handle duplicate paths so we generate one device with multiple links
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16 19:58:35 +00:00
858ac5c5cd
- Make all ports use config.h for if they have chip_config or chip_info structures.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1684 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16 09:13:23 +00:00
92986807bb
- Cleanup the bugfix in elfboot.c
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- Add forgotten amd8111 chip.h
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1683 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16 08:45:29 +00:00
f3ed1cfad7
- HDAMA boots!
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- Set the bootstrap processor flag in the mptable.
- Implement 64bit support in our print statements
- Fix the reporting of how many cpus we are waiting to stop.
It is the 1 less than the actual number of cpus running.
- Actually enable cpu_initialization.
- Fix firstsiblingdevice in config.g
- Add IORESOURCE_FIXED to all of the resources set by config.g
- Fix the apic_cluster rule to add an apic_cluster path not an apic path.
- Add a div64.h to assist in the 64bit printf.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16 08:38:58 +00:00
7003ba4a88
- First stab at running linuxbios without the old static device tree.
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Things are close but not quite there yet.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16 06:20:29 +00:00
216525d1fd
- Fix config.g and the hdama config so everthing builds again.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1680 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16 02:48:37 +00:00
e2ad5ce697
fixed function prototype for die()
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1675 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 23:05:08 +00:00
3287f0b9a1
- Change broken usage of get_resource to find_resource.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1674 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 23:02:00 +00:00
448bd635c0
- Finish interrupted merge
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 22:52:15 +00:00
e5ac2959bb
oops.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1672 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 22:44:26 +00:00
119e00e2e1
- Fix fat fingered merge
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 22:35:23 +00:00
3614eebc13
- Update so we no longer require console.inc
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1670 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 22:29:26 +00:00
1944680bfd
- Sync up northbridge/amd/amdk8
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 22:06:29 +00:00
297b06e6f9
- Update the header files in reset_test.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1667 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 21:55:53 +00:00
73f2282ea1
- Add a generic device that does nothing
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1666 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 21:43:24 +00:00
4b93394872
more breakage, thanks to Ron
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1665 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 21:40:58 +00:00
03acab694b
- Updates for 64bit resource support, handling missing devices and cpus in the config file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1664 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 21:25:53 +00:00
992cd008f1
- Update the device header files
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1663 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 21:10:23 +00:00
b78c1972fe
- First pass through with with device tree enhancement merge. Most of the mechanisms should
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be in place but don't expect anything to quite work yet.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 20:54:17 +00:00
cadfd4c462
- Add arch/cpu.h
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 20:52:22 +00:00
65186ce66c
- remove old cpu header files
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- Update cpu.h for the new cpu initialization scheme
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1660 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 20:15:40 +00:00
c84c1906b7
- Renamed cpu header files
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1659 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 20:13:01 +00:00
b84166e8e5
- remove deprecated directories
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 19:39:27 +00:00
fcd5ace00b
- Add new cvs code to cvs
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 19:29:29 +00:00
02fa3b2743
epia-m support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1655 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-06 17:33:54 +00:00
4fa89208a1
f'ing thing still won't work.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1654 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-06 17:19:49 +00:00
ed9f18d545
mods for i855pm that don't seem too wrong. ha!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-30 22:50:13 +00:00
a4779e80c3
digital logic stuff, fixes for the smbus code in 82801dbm
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1652 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-30 16:37:22 +00:00
a26c8ef2a0
add support for ICH4. more i955pm stuff.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-28 20:09:06 +00:00
c3c27a50d9
add include to fix build
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1648 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-09 07:19:40 +00:00
7b08c116b9
removed unused code, code reformat
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-07 21:20:53 +00:00
981faa09e4
rename variable from addr to dev
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1644 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-07 19:24:40 +00:00
43dd85e7ec
more fixes.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-30 16:08:30 +00:00
009f87a30b
build fix for epia-m so that nobody beats ron to it ;)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1642 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-27 21:39:59 +00:00
6707a45eb1
just a few changes before we hit the big fun.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1641 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-26 16:13:40 +00:00
1ddc8eaddb
more updates for 855
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1640 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-25 18:19:08 +00:00
e6552bcf39
changes for the dbm part. Still need to remove the sata file ...
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1639 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-25 15:40:47 +00:00
3b0096313a
compiles.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-24 22:27:55 +00:00
74bfa2c8b2
stupid ron! need to start names with a letter.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1637 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-24 22:17:33 +00:00
7da4d6a089
start of port of adl855pc
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1636 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-24 17:29:29 +00:00
0fb38825cb
fixed up tables.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1635 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-24 17:23:37 +00:00
182615d635
new intel io hub.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1634 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-24 16:20:46 +00:00
c66444c175
new mainboard
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-24 16:11:50 +00:00
300e1b569a
random fixes.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-23 21:04:36 +00:00
92d159f27d
dpx114
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1631 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-23 20:41:25 +00:00
55a6d461a6
new mobo
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1630 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-23 20:25:17 +00:00
03935036ab
adding 855pm
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-23 16:43:25 +00:00
198409afe0
create some technologic systems ts530 infrastructure
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-07 19:58:46 +00:00
40ab2d1213
add Config file for ts5300
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1627 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-07 19:34:46 +00:00
4c5060dc2b
move default_resource_map to its own file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08 16:59:06 +00:00
f76a613a9a
code reformat, removed unused code
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1622 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08 16:57:43 +00:00
9ab91f5acb
code reformat
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08 16:54:20 +00:00
badf114438
fixed again.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-06 16:57:44 +00:00
737de849d5
fix for simple error
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1618 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-06 16:35:50 +00:00
e89137b2ad
remove_logical_cpus need call get_option
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-01 04:21:49 +00:00
70093f7875
Intel E7501 P64H2 ICH5R support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-01 03:55:03 +00:00
7dea9552d5
- Small bug fixes to romcc. The deep problems with not inlining functions remain
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-29 05:38:37 +00:00
7fb8916011
make cpuid and mtrr check conditional. They are not there on cpus older than
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i586/i686.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-28 12:06:20 +00:00
f2065a4cf9
add qemu graphics card initialization driver
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-28 12:04:06 +00:00
e2b53e1432
add northbridge code for qemu-i386
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-28 11:59:45 +00:00
4a3bb76aa8
commit initial qemu support (see http://fabrice.bellard.free.fr/qemu/ )
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-28 11:57:31 +00:00
c7d4db7ff1
Now it should build on the first try :)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-16 15:32:43 +00:00
99efe80122
add support for AMD Serenade mainboard, why we have phantom devices here?
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-15 23:55:55 +00:00
6ae2ac3739
add support for AMD Serenade mainboard, why we have phantom devices here?
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-15 23:37:34 +00:00
9b1a2ff96f
code reformat, is the pirq table correct?
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1605 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-15 03:00:35 +00:00
0b607b39ba
simplify pirq handling. Only apply consistency fixes on the copied version
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of the pirq table.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1604 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-07 10:25:42 +00:00
ab8ff84402
Add extra phase before memory init.
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Rename sdram_init to memory_init
NOTE: need to test sandpoint and ep boards!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1603 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-05 14:54:46 +00:00
8ce104f487
memory and pci up!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1602 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-05 14:36:23 +00:00
2f2e63bc7d
BDI2000 config file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-04 22:46:30 +00:00
c72e27616d
enable early uart
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-04 22:28:23 +00:00
cb5f0ce6a7
fix addressing
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-04 22:27:33 +00:00
91d60a8fca
first cut
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1598 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:57:09 +00:00
2906362ea7
nothing yet
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:56:01 +00:00
5b2565a6df
fixup
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:55:24 +00:00
f78ba9dfa6
prelim sdram
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1595 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:53:41 +00:00
0ba0ce6b79
briQ timer support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:51:18 +00:00
66c07cdc94
Make names more sensible.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1593 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 16:30:02 +00:00
ca68a91eff
Clock (not timer) routines are board specific. Moved to appropriate
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mainboard dir.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1592 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 14:39:16 +00:00
0dcb172904
Clock (not timer) routines are board specific. Moved from mpc74xx dir.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 14:38:12 +00:00
515f6b68a0
disable noop usb drivers. remove warnings
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03 07:57:12 +00:00
bb20a72163
This will never happen unless the code is buggy (in which case it's easy to
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reenable debugging output).
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 15:10:04 +00:00
34e3a146a9
console code cleanup.
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- drop srm console code (not supported anyways)
- make internal uart8250 console functions static
- split vsprintf.c into vsprintf.c and vtxprintf.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 15:07:03 +00:00
319d6730e9
add some debugging
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1584 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 14:55:28 +00:00
d67e76568a
- Added volatile to asm statements in auto.c and failover.c
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- Updated the romcc version in Config.lb
- Fixed type sizes in romcc_io.h and io.h inl() returning a byte was nasty
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 14:18:45 +00:00
6f52a90ad3
Fixed a silly typo :)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-27 21:10:47 +00:00
d5994ce9c1
fix build. :( sorry, forgot to commit this one.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-27 13:54:38 +00:00
76712933a0
gcc uses slightly different syntax
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-27 11:13:24 +00:00
4bfb1f6ce0
cosmetics
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-27 11:09:14 +00:00
bb8602b6ea
GPIO2 and GPIO3 support for HF part.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1575 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-26 19:18:21 +00:00
58133c29fe
Early work on IWill DK8S2 motherboard.
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Tweaking in progress.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1573 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-26 17:21:02 +00:00
36a74b0c18
cleanup
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1572 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-26 15:54:41 +00:00
38ffff0d72
move arch/<arch>/config to arch/<arch>/init
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-26 15:43:27 +00:00
e891783e5f
indent (left in tree since last indent action)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1570 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-26 15:27:43 +00:00
9220f91f9c
minor reformat
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-24 19:48:13 +00:00
9da7ff91f5
added AGP support for AMD K8
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1568 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-24 19:04:47 +00:00
7b095aa1d9
minor reformat
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-24 17:35:52 +00:00
c8ccf8ac0a
Definition fixed by Ollie
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1566 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-24 17:14:21 +00:00
2e6d1c9fe0
refactored k8_cpufixup, added IORR support for AGP aperture
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1565 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-14 17:28:47 +00:00
d34b943d36
refactored mcf3_set_resources
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-14 17:23:26 +00:00
54f05f6c5c
use #define macro for pci class ids
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1563 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-14 17:20:29 +00:00
13318d9fea
code reformat, remove BY YHL comment
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1562 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-13 20:41:49 +00:00
b7ae8cf8a3
don't enable VGA/ISA here, it is done in device.c:allocate_vga_resource
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1561 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-13 20:40:12 +00:00
6a8745ae57
code reformat
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1560 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-13 20:39:07 +00:00
5002af6a18
seperate font file from btext_console.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1559 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-13 20:37:02 +00:00
9e17d4f2e2
back out immature amd8111_enable stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1555 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-13 16:49:53 +00:00
fd3f2d7945
remove unused l2 cache configure, if we really need it some time in the
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furutre, it should be in cpu specific fixup code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1554 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-12 16:34:46 +00:00
a60bf67b32
fixed minor bug in APG bridge code. Use AGP_APERTURE_SIZE instead of IOMMU_APERTURE_SIZE
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1553 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-10 19:33:27 +00:00
9f0d0f9669
rename walk_static_devices
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1552 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-10 16:05:16 +00:00
75337f7500
code reformat, fixed a bug in set/unset logical operation
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1551 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-07 21:56:48 +00:00
89666e4893
change walk_static_devices() to scan_static_bus()
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1550 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-07 21:54:23 +00:00
fb4c50f695
code reformat, doxidization
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-07 21:52:47 +00:00
3bb314725a
replace up,across,down with ltd0,ldt1, ldt2
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Although it is not used currently, misuse of terminolog is still a misuse.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-06 21:39:39 +00:00
9782f7538c
code refromat, doxidization
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1547 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-05 21:15:42 +00:00
7ccff4ea0c
Disable AMD8111 USB2 and remove hard code addr in amd8111 IDE
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-05 18:03:42 +00:00
52f851dd1d
put extern keyword in front of declaration, make the compiler do it job
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1545 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-30 23:11:23 +00:00
d16753be86
chaged chip_device_path::enable to chip_device_path::enabled,
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again, I am the only one who can't speak English.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-29 20:30:02 +00:00
69c5a905ed
changed dev->enable to dev->enabled. Sorry, I am the only one who can't speak
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English in the project.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-29 20:08:54 +00:00
fcdd571aee
corrected irq and mp table according to new bus enumeration
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-28 18:49:24 +00:00
500497fc34
indent
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1541 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-28 08:08:06 +00:00
97c4947ec9
Changes for btext and etherboot and filo merge support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-28 05:37:36 +00:00
48d11d557f
Fixed the device on bus 0 problem for IBM/E325. The structure mainboard_ibm_e325_control is
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not actually defined in the mainboard.c. It was only declared in chip.h. Why gcc did not tell
me this mistake and why gcc does not complain about define a structure twice ?
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1539 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-27 17:00:40 +00:00
5782d273eb
check in the current code for IBM/E325, can somebody help to fix it ?
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-26 17:51:20 +00:00
1e1a34fdd1
comment out scsi controller init in s2880 mainboard
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1537 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-26 17:43:30 +00:00
b6ce3ec68c
indent files to reduce the noise in further diffs.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-24 23:25:56 +00:00
234454d900
add missing include files for btext console. add YhLu's fixes to ragexl code
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-24 23:10:51 +00:00
2ab88d1179
Major merge of YhLu's code from 2004/04/20: add s2875, various other updates,
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cleanups. Drop "driver" code from mainboard directories and use them from the
driver directory instead
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-24 23:01:33 +00:00
f05dcb8d7a
Add btext console (from YhLu)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1533 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-24 22:29:44 +00:00
8581ac215d
Don't optimize link read pointers for UP systems (from YhLu)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1532 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-24 22:26:19 +00:00
Eric Biederman