a7aa29b943
Use the canonical name of the vendors/devices and the
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same format for all CHIP_NAME() entries in LinuxBIOS (Closes #20 ).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@linuxbios.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-05 18:50:49 +00:00
a9e273593f
Fix a typo in elfboot.c. Closes #27
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Signed-off-by: Luis Correia <luis.f.correia@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2488 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-05 12:18:58 +00:00
1549f2a557
Various minor cosmetic changes in the ITE Super I/Os, mostly whitespace
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changes and fixing of comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-04 23:19:00 +00:00
faea4c59ab
Sorry, this is the last commit I will do this way, but MSI has waited a
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long time and I could not get into the tracker.
These are patches to enable ms9185 support. Abuild passes.
Signed-off-by: bxshi <bxshi@msik.com.cn>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2486 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-02 16:02:33 +00:00
9c33b7b81e
Remove some unneeded #includes from most mainboard.c files.
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2485 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-02 14:11:34 +00:00
a4c56c33ac
Adapt GPL license headers to match the current conventions.
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2484 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-01 14:31:00 +00:00
6fb43c85f1
drop unsupported unfinished mainboard Advantech SOM GX DB533-C
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Signed-off-by: Richard Smith <smithbone@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-01 14:21:31 +00:00
f28674ec3c
Rename some variables from *ITE* to *ite* for consistency reasons (refs #4 ).
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2482 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-01 12:52:49 +00:00
f044ede246
This change fixes a long-standing bug, whereby we do not set ret for an
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un-inited vector, which we should have done.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2479 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-27 18:22:13 +00:00
cf20187079
svn mv src/northbridge/intel/E7520 src/northbridge/intel/e7520
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svn mv src/northbridge/intel/E7525 src/northbridge/intel/e7525
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2478 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-27 11:40:01 +00:00
586470c646
Rename E7520 to e7520, and E7525 to e7525 in the code. The next commit
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will then rename the E7520 and E7525 directories respectively.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2477 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-27 11:38:22 +00:00
e0e1d42527
Fix the CHIP_NAME() entries of all mainboards to have the same format
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and (hopefully) the correct canonical name of the vendor and board.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-27 11:30:27 +00:00
3d61074108
Rename src/superio/NSC to src/superio/nsc.
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-24 23:08:10 +00:00
d86417bfa3
Change all occurences of NSC to nsc in the code. The next commit
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will then rename the src/superio/NSC directory to src/superio/nsc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2472 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-24 23:00:42 +00:00
814b458b63
fix leftover typo
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-24 12:46:55 +00:00
6e5b6a82ad
fix typo during rename. Subversion would not let
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me fix this before committing first.
Signed-off-by: Yinghai Lu <yinghailu@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2469 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-24 09:40:21 +00:00
9d6be3ec42
fix naming convention, turn X.
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another commit is following
Signed-off-by: Yinghai Lu <yinghailu@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2468 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-24 09:37:04 +00:00
1d8261d416
rename Iwill to iwill to keep naming scheme consistent
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2467 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-24 09:25:35 +00:00
b216e8fa65
remove DK8HTX, it's an old duplicate version of dk8_htx
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2466 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-24 09:23:23 +00:00
fd845a04a9
add the CAFE IRQ support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2461 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-18 16:00:10 +00:00
31101c9201
add the btest mainboard
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2459 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-18 15:23:28 +00:00
a112bb0bca
s2895 failover build
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2455 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-13 21:48:38 +00:00
0ab46b9026
return missed
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-13 20:10:09 +00:00
4bb8887ac4
change things that make no sense on ultra40. serial output now works!
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-13 19:58:52 +00:00
c34e3ab71e
DK8 HTX with CAR and acpi, and easy support for HTX
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2452 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-12 00:58:20 +00:00
d3eabbd77c
replace table based crc with computational one. by Ed Swierk.
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X-Signed-Off-By: <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2451 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-09 22:35:45 +00:00
ebafa4df42
Add serial stream payload support from Ed Swierk <eswierk@arastra.com>
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X-Signed-Off-By: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-07 00:13:24 +00:00
197a4a8dbb
MEMCLK to DDRXXX
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-06 16:05:14 +00:00
7110f9261f
K8_4RANK to QRANK
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-05 06:59:56 +00:00
ab9f49d2fa
init.o
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2444 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-05 06:24:21 +00:00
1792b2e801
make ppc happy for console
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2443 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-05 00:27:44 +00:00
6d74d76de4
get_bus_cong using sysconf instead
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 23:57:49 +00:00
d95465d08f
add missed asl for ht chain
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2441 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 23:09:09 +00:00
5f9624d211
CONFIG_USE_PRINTK_IN_CAR and ht chain id for HTX support in
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serengeti_cheeatah
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 22:56:21 +00:00
93a5a194c5
failover_failover apc lds
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2438 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 21:05:23 +00:00
15b8ea7473
socket 939
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 21:04:49 +00:00
8d22a5dc69
amdk8_sysconf
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2436 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 21:00:01 +00:00
d4b278c02c
AMD Rev F support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 20:46:15 +00:00
984371554b
add irq for keyboard and mouse
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2432 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-21 20:55:58 +00:00
2ad85dbc65
Lots of lx fixes. CLeanup mainly. THings now build
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2430 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-20 16:39:30 +00:00
e8bfbb387c
This driver is a mistake, removing it.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2429 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-20 16:32:59 +00:00
efba85f00e
commit moire changes
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-19 19:30:11 +00:00
5f23b6cd7d
add the msm800srv ; put the usb in the right place.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-19 17:37:32 +00:00
a341ee2646
put this in the right place.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2425 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-19 16:44:14 +00:00
830a79eeab
add an OLPC target for qemu
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-19 03:43:30 +00:00
4d6810c60c
add the _lx flavor of the 5536. This will later be merged into the
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cs5536, but I don't want to mess up the OLPC, and we really need the lx
support NOW.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2421 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-18 22:52:24 +00:00
2cf779d8d1
fix old bug in the src/devices/pci_device.c
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add devices for the lx and artecgroup/dbe61
point artecgroup at cs5536_lx as it is so different.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-18 22:50:51 +00:00
0740c31cff
A fix for hynix dram problems seen at 366/244
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2419 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-18 04:23:23 +00:00
46bcaa303b
fix variable name for ts5300
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2416 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-15 14:53:55 +00:00
b2f98af71e
fix stupid missing " type
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2415 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-14 20:08:10 +00:00
53f486a3ea
fix some really yuck stuff.
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now things might work.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2414 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-14 16:31:14 +00:00
cba07dd682
additions and mods for lzma.
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Signed-off-by: Carl-Daniel Hailfinger
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2413 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-14 15:12:36 +00:00
7d9441276f
changes for the lx and artecgroup mobo
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Signed-off-by: Indrek Kruusa
Approved-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 21:59:09 +00:00
5c16ebde91
new presents from artec group :-)
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Signed-off-by: Indrek Kruusa
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2411 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 21:25:20 +00:00
b9c100bdb7
add file for dcon support
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signed-off-by: Jordan Crouse
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2410 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 19:30:15 +00:00
e361efd7d7
Add DCON support.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2409 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 19:29:31 +00:00
66c335b8cc
fix cardbus interrups (signed off by Nick Barker)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2408 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 07:55:23 +00:00
613cb6171f
- fix irq routing for epia-mii cardbus slot. (signed off by Nick Barker)
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- some minor cleanups
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2407 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 07:52:41 +00:00
9cf0050d68
Slow down the clock, per Tom Sylla
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2406 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 04:33:07 +00:00
9cf642bad3
fix for qemu northbridge, from Ed Swierk
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2405 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 04:12:35 +00:00
aefa3d74f9
warm boot patch from richard smith.
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signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2404 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:57:47 +00:00
5ef4c598fb
Fix the irq_tables
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signed-off-by: ronald g. minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2403 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:14:45 +00:00
cdb89be9e8
mods for qemu, these build
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signed-off-by: ronald g. minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2402 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:10:08 +00:00
3e03d03a17
hurry hurry before we might start 3.0 ;-)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2400 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-08 16:34:51 +00:00
b59906c1e9
remove dangerous call to normal image; no backup on OLPC
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2399 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-07 15:31:27 +00:00
42fb3164ed
Uwe Hermann:
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Here's a patch which makes all "option ROM_SIZE" lines use x*y format
which is a lot easier to read and modify, without having to use your
brain or a calculator ;-)
Tested with abuild, no errors.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:42:51 +00:00
ca98f32dd5
Add support for ITE it8705f from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:15:02 +00:00
2073ce2675
Patch from Uwe Hermann:
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* support for it8716f.
* minor fixes for it8712f, it8671f, it8673f
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:12:39 +00:00
61be08bd3e
merge latest code from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-29 17:41:14 +00:00
abaf71a2d5
it8661f support from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2393 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-29 00:45:42 +00:00
bcd1f2310d
- Much better USB P4 fix.
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This one actualy works. You cannot just go mucking about with stuff that the VSA
has under its thumb. Bad Things happen. This does it the VSA way.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2392 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-28 16:18:32 +00:00
6af77aeb40
Support for two new ITE superio parts: it8712f
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and it8673f from Uwe Hermann.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2391 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 19:29:57 +00:00
fa60e7f9d0
- USB P4 as host fix
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This should make the USB P4 work as a USB host
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 16:14:31 +00:00
64443b8c49
- fix a silly pointer dereference thinko in my previous commit
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 14:06:48 +00:00
59ba228f92
- Added suport for enabling USB P4 on the olpc
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USB P4 is disabled by default and we need to setup the mux bits proper
to make it work. This is the frame work for that. All thats needed
is the right address values
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 05:01:30 +00:00
eca92fb371
Uwe Hermann:
...
here's a patch which replaces all DOS newlines with Unix newlines, and
removes some useless $Rev$, $Id$, and $Header$ tags.
(part 1)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-23 14:28:37 +00:00
6a1540b606
enable graphs created by dot.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-23 11:47:58 +00:00
1ac1cf527d
delete unused device.
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set rom to 512k
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-18 19:25:25 +00:00
8a02b7d54e
add smsc part. Mod sun board to use smsc part for now
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2380 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-17 20:31:09 +00:00
bff323b93b
updates to make gx1 IRQ map work. not tested;
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signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2379 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-16 14:38:00 +00:00
157e1ab47c
share decompression code.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2378 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-16 14:22:10 +00:00
60146861aa
this file is already included by auto.c on all targets.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2377 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-15 13:52:51 +00:00
9d65e6ec02
cleanup patch from Uwe Hermann.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11 23:48:14 +00:00
4c556c5ccb
fix serial initialization (from Uwe Hermann)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2371 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-10 09:38:39 +00:00
af9cd4d0cf
change from AMD for the IRQ10 problem.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-10 03:23:48 +00:00
08af3f535d
mods for the ultra40 bringup. This now builds.
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amd gx2 north -- don't set anything in the north, it conflicts with vsa
settings. So we have our own pci_set_resources that is essentially a
no-op -- just calls the kids.
olpc rev_a config -- DISABLE the compressed rom stream. This SHOULD NOT
have been set -- it is untested and caused real trouble.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2369 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-09 02:21:49 +00:00
e53d03c211
fix up the links for the ultra 40 -- i/o on ht 1 on each cpu
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2368 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-08 21:42:18 +00:00
a758acab7f
fix up config space.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-08 18:02:12 +00:00
90e68aef68
initial work on sunw ultra40. It's wrong :-)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2366 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-07 20:02:02 +00:00
4253844428
add support for ite/it8671f superio from Uwe Hermann.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2365 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-07 16:48:11 +00:00
ac4ca2b17e
p2b uses i82371eb as well.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2364 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 08:58:17 +00:00
a14b46895c
final rename orgy. sorry for the inconvenience. This should fix it again
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2363 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 07:50:59 +00:00
c76b85d6a7
ouch. it's 8_2_371. I'll fix it. This commit breaks compilation
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2362 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 07:47:28 +00:00
d34758f05a
rename southbridge i440bx to its actual name i8371eb
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2361 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 07:45:45 +00:00
8e3464109e
Changelog:
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* src/cpu/amd/model_lx/model_lx_init.c
L2 cache initialization removed (moved to northbridge.c)
* src/include/cpu/amd/lxdef.h
more checked values
* src/northbridge/amd/lx/northbridge.c
L2 cache initialization added
cpubug() commented out
* src/northbridge/amd/lx/raminit.c
empty function sdram_set_registers() is in use, don't remove
* src/mainboard/artecgroup/dbe61/Config.lb
irqmap changes
* src/mainboard/artecgroup/dbe61/irq_tables.c
tentative changes to irq table (currently not in use)
* src/mainboard/artecgroup/dbe61/mainboard.c
irq assigned manually to NIC
* src/mainboard/artecgroup/dbe61/Options.lb
gcc 4.0 is OK
* targets/artecgroup/dbe61/Config.lb
64K for VSA is OK at moment
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Andrei Birjukov <andrei.birjukov@artecdesign.ee>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-03 16:48:18 +00:00
8ad7c06535
slightly changed C.D. Hailfinger's precompressed rom stream patch
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2359 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-03 16:19:27 +00:00
085cb4b4ca
Allow setting of serial port speed in EPIA-M config file.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2357 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-02 12:46:13 +00:00
5eca3489b7
Add newer Via Nehemiah stepping levels.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2356 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-02 12:26:47 +00:00
f4c0b596a2
Geode LX: this patch adds configuration/status/self-test MSR definitions
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for L2 cache and fixes wrong P2D defines.
This also patch adds L2 cache initialization for Geode LX CPU.
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2355 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-02 11:30:32 +00:00
d7088c459c
- Fix some copy bugs and thinkos in the i440bx SMbus
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read code. SBbus reads to RAM now work. Yah!
- Rename the register constants to something I can look at
more easily.
- Make the logic flow match the flow from V1 assembly
- #if 0 out other SMbus functions that are still broken.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2353 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-30 00:23:20 +00:00
01789b630f
- fixup Bitworks/IMS to use private copy of SMbus debug routines
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Re-enable the SPD dump routine in this Bitworks/IMS code and make
it work like the Asus/p2b. This avoids having to hack the
sdram/generic_dump_spd.c for a single mem controller.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2352 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-29 18:01:43 +00:00
924f92faa2
- Add support _framework_ for the Asus p2b.
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- New superIO winbond/w83977tf
- Add single memory controller SBbus debug routine
into a file private to the i440bx
This adds support the start of support for an Asus p2b
mainboard. Current limitations are the same as for the
Bitworks IMS board. Reads from the SMbus don't work.
Moving dump_spd_registers() into its own private copy
solves the problem of having to go hack on the version that
included in src/sdram to only do one memory controller.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2351 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-29 17:40:36 +00:00
5e9dc23120
This patch adds support for the AMD LX cpu.
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There is one global change to pci_ids.h. The rest are changes for LX. I
ran abuild and it is ok. Not all artec design changes are included as
some of them would adversely affect other mainboards. Indrek will need
to test.
Signed-off-by: Ron Minnich
Signed-off-by: Indrek Kruusa, indrek.kruusa@artecdesign.ee , artec
design.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-28 16:06:16 +00:00
59fc4db642
"Hey Ron - Attached is a simple patch that enables the upper banks on the
...
UART. If the upper banks are enabled, then the Linux 8250 driver knows
how to set baud speeds greater then 115200. This was prompted by David
Woodhouse.
Jordan"
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-27 04:05:43 +00:00
cb8eab482f
add framework for i440bx chipset
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add support for NSC pc87351 SuperIO
add Bitworks/IMS manboard config
This is a very basic framework for the i440bx chipset and the
Bitworks IMS board that uses it. Most things are
structure only.
Known issues:
- SMbus reads to the RAM SPD come back
all zero.
- dump_spd_registers() is commented out since it breaks with
the default setting of generic_dump_spd.c where it wants
2 memory controllers.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-24 04:25:47 +00:00
4788effb04
restore the old code for enabling flash. The new amd code did not work.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2346 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-21 23:21:01 +00:00
da7ee9fa07
These changes incorporate steve goodrich'es fixes, and one bug that is
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disabled.
cs5536: add new entires for SB control etc.
cs5536.c: chip_enabled function moved to chip_init, so it only gets run
once.
IRQ setup improved
gx2def.h: new defines added
vr.h: new file, with new def's for virtual register control.
mainboard config.lb: new entries added for nb and sb control.
chipsetinit.c: new controls added -- I forget all the details :-)
grphinit.c: new function added
northbridge.c: new IRQ control added. FlashChipSetup added, controlled
by chip info setupflash struct member. Currently, if enabled, this hangs
OLPC in linux PCI scan.
chip.h: new struct members added for unwanted device enable, flash setup
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-21 19:21:38 +00:00
87f194dd9e
this code is for writing the mp table, so only execute it when
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we actually have one.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2343 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19 16:58:43 +00:00
4f1cb23426
move mptable to 960k to 1M
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https://openbios.org/roundup/linuxbios/issue55
This patch is a little bit enhanced, it keeps the ppc table consistent,
which Yinghai's original patch did not.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19 15:32:49 +00:00
792ebfecd3
closing issue 44: rename ram clocks in cmos.layout
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https://openbios.org/roundup/linuxbios/issue44
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19 14:26:41 +00:00
ef0a24381b
fixing aruma build as suggested by mail ;-)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-18 18:09:36 +00:00
f780d02295
sorry for the inconvenience. this is a test commit.
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breaking a build is intentional. It will be fixed in a bit.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-18 16:53:19 +00:00
e26d66e9dd
fix handling of mkelfImage'd binaries
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-11 09:04:52 +00:00
707097fc1c
fix interrupt for f5 (ehci)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-27 02:26:06 +00:00
aad235e906
changes per steve goodrich.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2334 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-27 01:38:17 +00:00
92e8b809b4
fix typo on duplicate line.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-24 14:46:26 +00:00
5560a34c88
fix compilation of s2892.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2330 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-23 20:10:21 +00:00
53a00b7138
match settings per steve goodrich.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2329 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-23 03:39:10 +00:00
88fb1a6c37
set up interrupt values for the southbridge, and add a function to
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manage them. Make pci_level_irq global. Add value settings for OLPC
rev_a board. Comment out no-longer-needed code in olpc mainboard.c
-- it is replaced by the settings in Config.lb, and the support
in cs5536.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2328 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-22 04:37:27 +00:00
9d0b30dd2b
Fixes from AMD. Tested to build on rumba and olpc, and builds.
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Tested to booting linux on olpc, and boots.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-20 03:53:54 +00:00
1f96360315
delete two empty files
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2326 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-18 07:44:45 +00:00
3951027f57
* delete two empty files
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* commit SMM lock code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2325 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-18 07:41:48 +00:00
2d7bb59018
fix idiiot typo I did not catch.
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add support for conditional enable of uarta interrupt.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-18 02:28:07 +00:00
48415d5cf6
add irq mapper support for OLPC and other boards that need this mapping
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done for the gx2 north. tested on OLPC.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2323 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-18 01:29:42 +00:00
6ab0fa9fed
add k8 processor name handling as required by the k8 revision guide.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2322 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-14 23:22:04 +00:00
fd14d4414a
remove erroneous cache disable.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-14 13:56:28 +00:00
73c92a4a7c
ron forget an svn add.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2319 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-12 20:37:33 +00:00
90dc0db6de
Get rid of #if 01 and debug prints that are compiled out.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-12 20:36:51 +00:00
fb93749642
changes from AMD for making OLPC video work.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2316 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-10 22:57:15 +00:00
890ee09a32
further development of OLPC. Set vsm size to 35k. add PCI IRQ for USB.
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Set linuxbios size to 28k. Drop debug level to 8.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-08 14:19:49 +00:00
2d1fe3700e
fix two mainboards that have been broken by someone who does not use abuild.sh
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-26 16:23:00 +00:00
b5fcfdbf89
add DK8HTX support.
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VSAs now required to be nrv2 compressed
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-25 22:08:23 +00:00
d0cffada3c
fix broadcom/blast, tyan/s2735, tyan/s2891, tyan/s2895 broken by r2307
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2311 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-25 12:40:03 +00:00
9dd8d56192
co processor support with s2891
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2310 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18 17:09:14 +00:00
9a8e36da2d
init the ECC for BSP and AP at the same time. So reduce init cpus time
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from 2.1x to 1.1x or from 4x(SERIAL_CPU_INIT) to 1.1x
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2309 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18 17:02:17 +00:00
2b396cdcf2
add option to decide to use onboard vga or addon card.
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CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2308 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18 16:54:30 +00:00
bad9d105cf
cleanup some of the compressed rom stream ugliness -- more to do!
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olpc and rumba can now boot linux out of flash. vsa was resized to 64K.
olpc and rumba now used compressed payload -- thanks stefan!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18 03:07:16 +00:00
5d573c28e7
Commit for IDE NAND FLASH
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2306 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-16 02:51:16 +00:00
98e904ea7c
OLPC now builds and works just fine.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-15 04:44:15 +00:00
b9a335cb9b
correct it, finally.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-12 20:05:08 +00:00
6084160f2d
memory size in cf07
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goodrich pll code
disable havedmi
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-12 18:42:34 +00:00
49a89f19f2
Use a real variable to configure rom base for vsa ...
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2301 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-06 02:54:45 +00:00
694d20e2d6
This is to enable COM1 early.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-05 18:18:33 +00:00
1656c18d76
reorder early startup so that it might work.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2298 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-05 03:54:31 +00:00
070a10f759
mods for early printing on OLPC
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2297 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 23:05:49 +00:00
ab4f5d0c10
fix the tree
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2296 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 10:08:04 +00:00
7ac38a33f6
don't wait core0 started twice
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 01:05:22 +00:00
52377deec0
core range and set_init_ram_access
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2294 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 00:58:14 +00:00
b73fd56488
rm unused file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2293 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 00:48:49 +00:00
608d4b2c44
merge zrom to rom_stream and print olen ilen
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2292 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 00:47:15 +00:00
4c47532134
oops! Slap me on the head for this one. Quick fix for ward until
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YhLu's suggestions are all there..
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2291 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-03 23:10:00 +00:00
c01fe5d1b6
more changes; rumba enet works fine now.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2290 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-03 03:30:23 +00:00
dc7b71cffa
enable compressed payload per default
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2289 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02 12:07:36 +00:00
ead73689db
add automatic payload compression method to LinuxBIOS
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2288 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02 12:05:13 +00:00
d3ba4aaa24
Fall back to pre-broken settings and setup for GX2.
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We lost a few things, but this is still worth it.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02 03:07:11 +00:00
ae3cbe951b
typo
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2286 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-29 00:12:30 +00:00
64f07fb21c
remove more code
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2285 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 20:44:53 +00:00
c1a4b2b0e5
code cleanup, comments added
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2284 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 18:40:15 +00:00
b947b14734
more code removal and removal of incorrect register settings.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2283 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 17:46:27 +00:00
94571a4767
removing redundant and unneeded calls to functions.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2282 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 17:37:23 +00:00
3716427e7f
we don't need msr_init
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 15:10:55 +00:00
b7a09b4f19
some todo and comment for ron.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2280 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-26 22:07:16 +00:00
417d8c44f9
set irq options.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2278 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 20:05:38 +00:00
cf120d1a89
builds and should do the right things for sb for interrupt routing.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2277 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 19:57:39 +00:00
1c2f49e74a
to give ollie a look.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2276 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 19:40:20 +00:00
5ee2bbb90c
fix the msr.lo for olpc 0x20000019
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2275 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 04:07:44 +00:00
6c20eb4400
hex values with 0x prefix
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-24 16:56:05 +00:00
2a7352cb9d
Adds a CONFIG_MAX_PCI_BUSES to pci_locate_device()
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Default is 255.
This allows mainboard configs for working across various groups
of boards that differ a device that may not loaded.
If you search for a device that is not loaded and max buses is 255
then there can be up to a 8 second delay to search the entire PCI space.
Board configs that know thier max bus can limit this search space.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2273 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-23 23:12:21 +00:00
2f19800268
fix so that olpc uarts come up enabled.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2272 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-23 19:21:12 +00:00
496450c4eb
Lower debug progress messages in vt8623 init to debug level rather than error.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2270 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-21 16:43:06 +00:00
a910a3a022
more 5536 -> 5536 conversion
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2269 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 22:54:32 +00:00
bbdaeaf55c
change to 5536
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:40:20 +00:00
32c315b1ef
change to 5536
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2267 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:38:14 +00:00
b8f4f8891d
remove dup files
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:32:43 +00:00
5d69896c87
add cs5536
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2265 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:31:47 +00:00
05c0869fac
boot to kernel
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:26:01 +00:00
37784b429d
added cs5536
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2263 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:22:40 +00:00
bc5a821f1e
add cs5536 directory
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2262 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:21:25 +00:00
5c97d78b1a
add cs5536 directory
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2261 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:21:13 +00:00
965b5ad85b
resolve conflict
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-19 15:11:01 +00:00
36c00aa39b
fix adjustment for sizeram
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 22:40:53 +00:00
61083dad0f
add back in missing line
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 21:34:32 +00:00
55e10fe3a4
set up timing
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2257 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 21:21:10 +00:00
170ce333ca
add ram resources
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2256 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 20:42:58 +00:00
df46cb205d
added the olpc target and support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2255 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 16:36:58 +00:00
ea9db56d0e
add SystemPreInit() and support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-13 19:44:50 +00:00
d8d8fffa0e
minor modification
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-13 17:00:38 +00:00
cf648c9a99
this was in my queue since 2005/10/26
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2252 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-11 19:23:57 +00:00
fbce0ffb92
small fixes to get Ward Vandewege's Tyan board booting.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2251 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-11 18:36:42 +00:00
4b8cf1d30a
added chipsetinit function, many defines. addec call to chipsetinit to
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northbridge.c
builds fine on lippert
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10 23:32:23 +00:00
45f6c5e3d4
add cpureginit to romcc code.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10 16:40:19 +00:00
526b2c429e
clean up gx2def.h a bit.
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Add cpureginit.c
added called to cpureginit to model_gx2_init.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2248 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10 16:14:19 +00:00
5346533656
drop unsupported momentum apache board. Check
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http://snapshots.linuxbios.org/stats/abuild-LinuxBIOSv2-2247.log
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2247 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-08 10:04:43 +00:00
2a9fcb79f4
15->11 for device num
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2246 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-07 20:35:39 +00:00
4223188335
add support for GLIUInit()
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-07 16:55:20 +00:00
40fedaf6a9
add northbridgeinit, also add new constants.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 23:35:52 +00:00
29e2726c4a
pseudo fix xe7501devkit
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 22:50:26 +00:00
f01f154635
fix constants style
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2242 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 21:45:24 +00:00
84e4bf69c7
interesting behavior, i thought svn could do moves.
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the result should be ok though..
the purpose is dropping the old i82801er southbridge code
and using the ich5r code instead because its the same chip
but the code looks more solid and is used by many more systems.
Some of the old i82801er features have been ported (like hpet enable)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2241 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 21:40:36 +00:00
966d0e6d70
break the tree really quick due to svn restrictions, next commit fill fix it
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again.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 21:37:10 +00:00
Uwe Hermann