f610d2466c
pre-mem startup
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1207 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:18:56 +00:00
2caf089187
naughty, naughty
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1206 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:17:59 +00:00
fe78c82c40
first cut
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:17:27 +00:00
383f5f6897
get_bus_freq()
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1204 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:17:04 +00:00
97c211e70f
memory turn-on
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1203 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 21:16:35 +00:00
079d53232b
get pci ops right
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 19:07:39 +00:00
47e64e8bed
missing directive
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12 19:06:53 +00:00
83b991afff
- O2, enums, and switch statements work in romcc
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- Support for compiling romcc on non x86 platforms
- new romc options -msse and -mmmx for specifying extra registers to use
- Bug fixes to device the device disable/enable framework and an amd8111 implementation
- Move the link specification to the chip specification instead of the path
- Allow specifying devices with internal bridges.
- Initial via epia support
- Opteron errata fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11 06:20:25 +00:00
080038bfbd
remove SMBUS_MEM_DEVICE_[START|END] traces from code.
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add 8mbit example config for amd solo.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-07 14:56:48 +00:00
a84c6f81ef
add smbus_write_byte() function. currently fails in romcc :(
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-06 15:04:41 +00:00
2e90c1daa0
no hardcoded addresses!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:16:19 +00:00
5b3b9aa5de
standard functions
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1195 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:15:48 +00:00
b6a259b0d2
no need for assembly
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:15:10 +00:00
e046fbbb2c
new cpu types
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:14:42 +00:00
be956f096f
size memory
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:13:12 +00:00
ccf4d34bb7
use standard name
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:12:56 +00:00
95ae7c1e5c
pci.S moved into arch/ppc/lib/pci_ops.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1190 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:11:52 +00:00
be84533ed6
getting options right
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1189 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05 05:10:52 +00:00
5ebf4d3431
- Modify the code to C style indenting.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-03 02:53:02 +00:00
fae510cd84
Some timing in here, but we don't set; it breaks.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 23:33:01 +00:00
ee163f3c18
ram size now set from SPD.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1178 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 22:54:43 +00:00
a70483b83b
First SPD code in and working!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 22:48:28 +00:00
cb3f498296
success. It boots as a bproc slave now.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 18:16:07 +00:00
6dd6c68507
IRQ setup for EPIA
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-02 00:08:42 +00:00
e0005ba6d1
fix sizing of PCI IRQ table in the Config.lb (there are only 5 slots)
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But linux still refuses to believe this table. What's odd is this is the identical table used in V1. Damn.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 23:18:14 +00:00
7cf52c979f
fixes for epia.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1172 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 22:25:36 +00:00
14e72218f3
uses statement missing
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 21:14:52 +00:00
6358a4a003
default USE_FALLBACK_IMAGE to 0
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 17:28:48 +00:00
848d336534
vga support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 16:09:23 +00:00
ab1f217161
some quartet memory init updates.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 14:12:57 +00:00
08febd8b67
new epia target for 512k: targets/via/epia/Config.512kflash.lb
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buildtarget now takes either a directory, and uses directory/Config.lb, or
takes a file
epia defaults to 256k flash
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1166 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 05:42:31 +00:00
320c6a0102
Fixes to the smbus code. Now for the fun.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01 01:45:43 +00:00
c18170b241
more fixes for via ... plus a little more spew.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 23:53:45 +00:00
303349a9d2
fix and complaint.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1163 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 18:18:22 +00:00
00359e91ec
remove references to static_devices.o
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 12:02:24 +00:00
fd5d0a5f05
get rid of static_devices.c
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don't use mptable on solo, it's not an SMP system.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 11:52:49 +00:00
99dcf231f4
The epia now works.
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Now to fix the ram ...
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30 02:16:47 +00:00
02360d6672
default is 256 not 512k
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1158 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-29 11:36:01 +00:00
67a1cb3207
ok that's it. I think this might work.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1157 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-27 04:28:39 +00:00
864a3d3474
a few tweaks etc.
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Still probably wrong.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1156 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-27 04:18:31 +00:00
6e5fe1d6fe
it's getting through the 8601 but the values are still not right.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1155 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 23:22:31 +00:00
854d234a06
something is wrong here but not sure what.
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But nothing is getting set into the north bridge.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 22:45:54 +00:00
f3c17ca234
via epia is putting out bytes!
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ron
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 22:10:53 +00:00
42acd12cbc
serial supprt.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 17:41:21 +00:00
11dbdf5d78
just to get us back where we were.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 17:16:14 +00:00
430111b9d1
It builds!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 16:12:23 +00:00
aa4b4e031f
add cpufixup.o
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 15:55:11 +00:00
9b4457afb0
cpu fixup for p6
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1148 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 15:54:34 +00:00
737fe21ebd
remove fixed ROM_SIZE setting, add default to 256k
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 15:36:03 +00:00
ef5f21807a
keyboard support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1146 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 15:24:54 +00:00
e1313fa183
added CONFIG_KEYBOARD, default 0
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1145 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 15:23:53 +00:00
987fe0f2a4
fix 'deprecated' warnings
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more via fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 14:36:27 +00:00
c817926a6b
via epia; also yh lu tyan.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 04:45:52 +00:00
3ff7bdaad7
new from yh lu
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 22:04:19 +00:00
6e71aec6cd
no default rom size
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 17:35:30 +00:00
ca34c040e5
ROM_SIZE has no default now.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1133 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 17:34:56 +00:00
57cef6590b
added via vt8231
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 17:21:57 +00:00
2b664dd0a0
first cut at 8601 support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 17:01:28 +00:00
c22465fc49
add another compat chain keepalife fix
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 13:39:53 +00:00
71e3c9ab15
khepri resource map update to keep compatibility chain
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1129 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 13:37:00 +00:00
bb79b0efb8
remove last occurence of AMD8111_DEV
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 12:54:55 +00:00
71e481d24e
update hypertransport setup for khepri
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-23 20:02:02 +00:00
a2241c821a
fix hypertransport setup for quartet.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-23 18:51:28 +00:00
9719cce5a3
make coherent ht setup capable of non-standard link configurations
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(i.e. with CPU1 not connected to ACROSS link of CPU0)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1122 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-23 18:50:35 +00:00
57398af2a4
update Config.lb and add khepri ht chain
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-11 13:53:29 +00:00
79249e3dbc
add new target for DSPACE DS1006 card, make quartet auto.c all verbose
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1109 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-11 11:53:15 +00:00
5282cd0875
remove old config files, adopt to new config method. fix resource map (?)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-09 13:30:58 +00:00
75d42640d5
update SOLO code (untested but compiling and pretty much complete!?!)
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drop old configuration method.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-08 14:03:50 +00:00
ff0e8465e8
- Include hypertransport.h in hypertransport.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-04 03:00:54 +00:00
6638755a23
- Remove dead argument to hypertransport_scan_chain
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-04 01:25:55 +00:00
481b5688b5
moved init_timer() to static initialization
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-03 21:30:18 +00:00
f72ff36e76
cosmetics
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-03 12:09:44 +00:00
0ac6b41e70
- 1.1.4
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Major restructuring of hypertransport handling.
Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically
Updates to hard_reset handling when resetting because of the need to change hypertransport link
speeds and widths.
(a) No longer assume the boot is good just because we get to a hard reset point.
(b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the
boot counter.
Updates to arima/hdama mptable so it tracks the new bus numbers
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-02 17:16:48 +00:00
e9a271e32c
- Major update of the dynamic device tree so it can handle
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* subtractive resources
* merging with the static device tree
* more device types than just pci
- The piece to watch out for is the new enable_resources method that was needed in all of the drivers
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-02 03:36:25 +00:00
d4c14524f5
- Update the version number to 1.1.2 and update the NEWS file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-01 23:47:37 +00:00
30e143a5f0
- Add back in the hard reset code from the freebios1 tree.
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This allows generic code to reset the box.
- Update the hypertransport code to automatically calculate link
widths and freequencies, and to call hard_reset if neecessary for
the changes to go into effect.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-01 23:45:32 +00:00
9bdb460a97
- Updates to config.g so that it works more reliably and has initial support
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for paths
- Renamed some configuration variables
SMP -> CONFIG_SMP
MAX_CPUS -> CONFIG_MAX_CPUS
MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS
- Removed some dead configuration variables
MAX_CPUS -> CONFIG_MAX_CPUS
MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS
SMP -> CONFIG_SMP
FINAL_MAINBOARD_FIXUP
SIO_BASE
SIO_SYSTEM_CLK_INPUT
NO_KEYBOARD
USE_NORMAL_IMAGE
SERIAL_CONSOLE
USE_ELF_BOOT
ENABLE_FIXED_AND_VARIABLE_MTRRS
START_CPU_SEG
DISABLE_WATCHDOG
ENABLE_IOMMU
AMD8111_DEV
- Removed some assembly files that are no longer needed
killed src/southbridge/amd/amd8111/smbus.inc
killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc
killed src/ram/ramtest.inc
- Updates to config.g so that it works more reliably and has initial support
for paths
- Renamed some configuration variables
SMP -> CONFIG_SMP
MAX_CPUS -> CONFIG_MAX_CPUS
MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS
- Removed some dead configuration variables
MAX_CPUS -> CONFIG_MAX_CPUS
MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS
SMP -> CONFIG_SMP
FINAL_MAINBOARD_FIXUP
SIO_BASE
SIO_SYSTEM_CLK_INPUT
NO_KEYBOARD
USE_NORMAL_IMAGE
SERIAL_CONSOLE
USE_ELF_BOOT
ENABLE_FIXED_AND_VARIABLE_MTRRS
START_CPU_SEG
DISABLE_WATCHDOG
ENABLE_IOMMU
AMD8111_DEV
- Removed some assembly files that are no longer needed
killed src/southbridge/amd/amd8111/smbus.inc
killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc
killed src/ram/ramtest.inc
killed src/sdram/generic_dump_spd.inc
killed src/sdram/generic_dump_spd.inc
- Updated the arima/hdama to build with the new configuration system
- Updated config.g to list all of the variables with make echo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-01 23:17:58 +00:00
b980e39c81
add first bunch of newisys khepri files.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-28 17:23:15 +00:00
f4440e65a4
more motherboard specific cleanups
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-28 15:08:43 +00:00
f5f10d1097
cleaning out motherboard specific changes from the generic directories.
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Moving tyan resource map to tyan directory. Making IOMMU for hammer choosable
via ENABLE_IOMMU
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-28 13:43:03 +00:00
fa2df758f2
support for new mobos and fixes
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-27 14:33:13 +00:00
bee6575d7c
fixed irq tables for hdama
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-26 13:28:50 +00:00
235c254563
more quartet fixes
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1085 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-07 14:11:08 +00:00
081e8cfd21
fix resource map for quartet
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1084 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-07 13:38:56 +00:00
fa875977e1
fix quartet build
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-07 12:32:01 +00:00
91232c1ca6
add XIP_ROM_[BASE|SIZE] to newconfig for quicker bootup
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-06 10:45:57 +00:00
4f1a6975ef
fixup. SMP works fine.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05 23:31:26 +00:00
95bbf58b8c
missing file chip.h
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05 13:43:18 +00:00
312f64a2c2
now needed.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05 02:24:56 +00:00
60e185fcc4
patches from Yh Lu. Tested and working on HDAMA
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-04 22:13:57 +00:00
a43048d371
Commits for the new config static device design, to allow more than one static
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cpu of a certain type and to eliminate the
cpu p5
cpu p6
cpu k7
nonsense in the old config files.
Next step is to hook into Eric's pci device stuff.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-04 21:05:19 +00:00
bbb6d1020f
- Fix poor resource allocation estimate.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1066 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-04 19:54:48 +00:00
dfa26a4d8c
- Remove useless definitions
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-01 03:01:54 +00:00
a265d5c0a0
- Update cpufixup so we support more than 4GB of memory
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1063 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-01 03:01:28 +00:00
8aeb2a4dbf
- Update raminit.c so it works properly for multiple cpus
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1062 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-01 02:52:35 +00:00
5f7fc31d70
fix for newconfig
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-31 17:44:02 +00:00
1188bd2adc
make solo target build again
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1060 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-30 11:22:50 +00:00
57ffeb0578
updates from YhLu, plus fixes for PPC/K8 issues.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-30 03:05:20 +00:00
714caaea38
PPC 4XX support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1056 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:21:03 +00:00
bd0ac35a77
use longs
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:18:51 +00:00
04091a67e5
PVR support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:18:26 +00:00
6257e0347d
added new routines
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:17:57 +00:00
06550b75e5
deal with different reset vector addresses
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:17:25 +00:00
cc6b6c4c83
made timer more generic
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:16:49 +00:00
008c127074
added ppc_ to function names
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:16:21 +00:00
499b3041b4
CPU_OPT for cpu specific flags
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_RESET to specify reset vector address (ppc4xx reset vector is at end of
memory, rather than at beginning of ROM)
CONFIG_SYS_CLK_FREQ to specify frequency of system clock (needed for ppc4xx
clock speed calculation)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:15:13 +00:00
821730906b
corrected cpu path, added clock.o
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:11:26 +00:00
8d82415628
cpus have vendors now
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:10:46 +00:00
a1cd3d8290
moved extern to chip.h
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1046 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:06:51 +00:00
b34e7c4077
Fix for RAMBASE.
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remove unused make.base.lb
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1045 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 04:34:15 +00:00
aead5f2582
change it so linuxbios.rom is the final target.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1044 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25 21:43:12 +00:00
138af8aa1d
Fix for ROM_SIZE to ROM_SECTION_SIZE
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25 21:42:02 +00:00
f8651ed6c2
one last fix.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25 17:31:53 +00:00
336b459018
fix bugs ron added with new options
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1040 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25 17:28:43 +00:00
35cce551c4
Mods for YhLu to enable calls for mainboard init.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25 04:32:42 +00:00
ebb645a9fb
YhLu's changes to resolve several memory and other problems.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25 03:05:54 +00:00
feaa75960c
Corrections for Config.lb for new tool.
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Bump up debugging messages and reduce the size of memory test until that is
running correctly.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25 02:55:26 +00:00
33fff7a0dd
moved cpu code to cpu/ppc/mpc74xx
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-24 21:05:02 +00:00
f7dd989955
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-24 21:03:45 +00:00
eb98b1c319
#if was reversed
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1028 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-24 14:20:01 +00:00
505322e48c
slight changes to static initialization
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1027 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-24 14:15:35 +00:00
9970bfcb7b
new register format
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1026 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-24 14:14:01 +00:00
92624c10d1
ep405pc board
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 22:20:55 +00:00
5bed979a9b
added post-pci pass
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 21:38:02 +00:00
c99bd5f38f
allow logging at spew level
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1018 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 21:36:12 +00:00
7100d67ae8
code was broken
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 21:34:46 +00:00
39264e2b3b
new static configuration
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 21:33:03 +00:00
6430c011f4
get CONFIGURE right
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:51:01 +00:00
23e107f184
fixed defines
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:50:06 +00:00
2910a2b545
static devices
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:20:17 +00:00
de085393ed
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:14:20 +00:00
252d3ff1f6
new register format
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:13:19 +00:00
99d0d7b300
getting HDAMA to build.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 01:45:47 +00:00
ffc161e59a
updates for hdama and other things.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 01:42:29 +00:00
4dc7b80151
updated for new code.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1003 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 01:41:55 +00:00
860ad373ef
- First pass at code for generic link width and size determination
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 23:30:29 +00:00
2c018fba95
- First pass at s2880 support.
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- SMP cleanups (remove SMP only use CONFIG_SMP)
- Minor tweaks to romcc to keep it from taking forever compiling
- failover fixes
- Get a good implementation of k8_cpufixup and sizeram for the opteron
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 20:13:45 +00:00
1b0e79704f
new chip stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 15:12:38 +00:00
2b02b63c54
new chip configure
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 14:00:53 +00:00
73a9cf4ccb
* update quartet target to latest SMP changes.
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* remove dead code from coherent_ht.c
* add ldtstop code for link speed changes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 13:05:56 +00:00
8275bad6f6
more chip stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 04:20:08 +00:00
54b3d233ed
more chip stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 03:38:42 +00:00
d0580343b6
chip stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-20 23:28:01 +00:00
9b4336cf41
- Major cleanup of the bootpath
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- Changes to allow more code to be compiled both ways
- Working SMP support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-19 04:28:22 +00:00
b2e67cdd2c
new config format
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-18 17:17:52 +00:00
f3961e0491
add AMD Quartet target
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 22:53:27 +00:00
438a3e423e
moved generate_row from coherent_ht.c to board specific auto.c files
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due to different routing defaults of different boards.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 22:51:30 +00:00
16743b89fb
new config format
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 22:11:58 +00:00
375505f5cc
dont export sandpoint options
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@976 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 22:10:11 +00:00
062d540139
sandpoint options
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 13:14:07 +00:00
b03b33697d
- Update Config so we now have the proper number of cpus
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- Remove some debugging code from auto.c
- Update coeherent_ht.c so we get the proper broadcast routes.
- Fix the dram probing code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@973 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 06:34:30 +00:00
2ec0020b3c
- Get the correct routing tables entries for the hdama's onboard nics
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@972 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 05:16:46 +00:00
5289938f06
Config.lb for this new part
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 04:35:19 +00:00
387a8db88e
- Remove excess line from pci_device.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 04:10:42 +00:00
d520759338
- Remove $Id: from crt0.S.lb
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 03:28:00 +00:00
4086d16ba2
- Implement an enable method for pci devices.
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- Add initial support for the amd8131
- Update the mptable to something possible
- hdama/Config add the amd8131 southbridge
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 03:26:03 +00:00
5fb929e6e3
- pci_device.c fixes for generic pci bridges to zero the unused portion of bridge resources
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- coherent_ht.c remove dead idle loop.
- raminit.c Enable a 64MB mmio window just below 4GB
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 02:15:46 +00:00
9b45b04d23
fix some glitches in cht code: always enable routing on node7, plus do masking right when setting cpucnt/nodecnt
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@966 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-16 15:23:57 +00:00
91a8ce7d80
- ldscripb.lb remove another $Id: line..
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- romcc_io.h Add include guards.
- hdama/Config nothing really but I have been moving the setting back and forth between 1 and 2 cpus
- auto.c Changed the enabled debugging comments. This almost works with 2 cpus
- coherent_ht.c First pass at getting this right. It can now find 2 cpus and place them
in some semblance of a working state.
- raminit.c Fix problems with 4GB of ram. Disable some of the debugging code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@965 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-16 07:04:58 +00:00
61b29a9b72
- Commit a binutils safe version of reset16.inc
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-16 01:58:18 +00:00
ae948f78e6
- Compile fixes
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@963 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 20:40:38 +00:00
50086df616
new config files
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 19:02:29 +00:00
8052f4d5da
new init format
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@961 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 18:03:07 +00:00
109959d6b1
new config rules
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 18:00:10 +00:00
68f9b1b135
new init stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 17:16:26 +00:00
a485fe9f10
IDE support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@958 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 17:08:57 +00:00
70572e64c1
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@957 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-13 23:30:23 +00:00
655bf44cde
- Remove all of the annoying $Id strings
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 02:15:12 +00:00
3d3f438937
- Use an SMBUS_IO_BASE value that will not conflict with an automatically assigned value
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:48:30 +00:00
548593ad66
- generalize generic_sdram.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:46:53 +00:00
bd537be3d2
- Add missing carriage return in ramtest.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:46:05 +00:00
c24a568551
- Solo updates
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:44:36 +00:00
58f74a2514
- Remove use of useless EXT macro
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:39:05 +00:00
64f7162e17
- Initialize list pointers
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:38:35 +00:00
542fe8056b
- Small typo fix in pci_ops.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:38:11 +00:00
b3e9b4a534
- Implement division and rdtsc support for romcc
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@947 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:37:33 +00:00
91b5ed1073
- Commit a working spd based memory initialization routine
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:35:24 +00:00
a074949981
- Remove bogus memreset parameter from struct mem_controller
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@945 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:32:08 +00:00
cf008e0ec1
- Add failover.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@944 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:31:13 +00:00
4264415c6e
- Update to a working version for the hdama board
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:29:57 +00:00
a3c708b5d2
static configuration. Needs new keyword per greg to enable inclusion of a
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part-specific struct into the tree.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-11 14:51:29 +00:00
57fa1b8279
- Code to enable and disable use of the sse and mmx registers
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-01 06:51:27 +00:00
6a3a3e5c98
placeholder crap for sio
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-30 17:23:35 +00:00
776fce9449
now builds with *0* tweaks.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-30 17:07:13 +00:00
db59928fd9
OK, now builds fallback for arima/hdama!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@917 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-26 04:05:37 +00:00
0f28460efb
more fixes but it appears that options are not picking up the right values.
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I set USE_FALLBACK_IMAGE to 1 in the top-level Config, but when it is tested
in arima/hdama/Config.lb, it is acting as though it is zero.
Also added a print command so it is easier to trace 'if' behavior.
Usage:
print "string"
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-25 03:20:22 +00:00
ed27a5e547
needed rules for DRIVER
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more fixes to various Config.lb
one last problem and we're there
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 22:51:16 +00:00
e15dfc1d9f
update to thing to make them work ... still not there though.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 19:51:38 +00:00
1807c37418
Fixes to various config files.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 19:44:00 +00:00
6d22c85326
update .lb
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we need to get rid of yappsrt.pyc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 18:39:11 +00:00
51305ee6cc
For new config.g
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 16:07:07 +00:00
432cc66984
arima updates
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 14:04:03 +00:00
9c8a06a379
hdama mainboard and target.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 03:45:36 +00:00
7254a89c88
oops, greg already did SMBUS, didn't notice.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 03:36:37 +00:00
a7b3cfff27
added SMBUS stuff.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 03:30:48 +00:00
9cf8c2efdd
_RAMBASE used by linuxbios_c.ld
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-23 05:00:08 +00:00
4890a666a9
Global options file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@888 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-23 01:01:17 +00:00
f7a0ba84dc
- Update the romcc version.
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- Add an additional consistency check to romcc and fix the more obvious problems it has uncovered
With this update there are no known silent failures in romcc.
- Update the memory initialization code to setup all 3 of the memory sizing registers properly
- In auto.c test our dynamic maximum amount of ram.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-19 15:14:52 +00:00
9dbd460776
- Remove bogus #if CONFIG_SMP test
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-19 03:34:54 +00:00
d3283ec05f
- A new test case for romcc
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- Minor romcc fixes
- In smbus_wail_until_done a romcc glitch with || in romcc where it likes
to run out of registers. Use | to be explicit that I don't need the short
circuiting behavior.
- Remove unused #defines from coherent_ht.c
- Update the test in auto.c to 512M
- Add definition of log2 to romcc_io.h
- Implement SPD memory sizing in raminit.c
- Reduce the number of memory devices back 2 to for the SOLO board.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-18 11:03:18 +00:00
99acb49cf7
added config and other test files.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17 16:51:06 +00:00
667393676b
new config file testing the update stuff.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17 16:48:07 +00:00
8d9c123812
- Minor mod to reset16.inc to work with newer binutils hopefully this works with older ones...
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- Update apic.h to include the APIC_TASK_PRI register definition
- Update mptable.c to have a reasonable board OEM and productid
- Additional testfiles for romcc.
- Split out auto.c and early failover.c moving their generic bits elsewere
- Enable cache of the rom
- Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17 08:42:17 +00:00
f7092040fd
More FB2 stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 22:07:53 +00:00
26ba0f5f9b
Freebios2
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 17:21:10 +00:00
64b2e474b1
Updated.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 17:16:36 +00:00
8cff29d63e
Added tables.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 17:09:26 +00:00
c055fbb274
Fixes.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 17:02:57 +00:00
88e467f38e
PPC cpu stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 16:54:40 +00:00
93247c0428
IDE stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 16:25:21 +00:00
0d796734a6
IDE stream driver
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 16:17:17 +00:00
7a5416af95
- Modify the freebios tree so the pci config space api is mostly in sync between
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code that runs without ram and code that runs with ram.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12 19:23:51 +00:00
540ae01cd3
- Changes to the pci config routines moving them closer to the non romcc API
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The goal is to have the same interface with or without romcc.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12 17:55:54 +00:00
05f26fcb57
- Factoring of auto.c
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- Implementation of fallback/normal support for the amd solo board
- Minor bugfix in romcc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-11 21:55:00 +00:00
c927b022c2
- Update romcc to version 0.27
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-10 21:25:29 +00:00
dc18ef018d
Moved from freebios
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-09 22:08:08 +00:00
f655bf7f3e
Moved from freebios
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-09 21:59:27 +00:00
0322115932
Moved from freebios
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-09 21:29:23 +00:00
a05b6ddb15
- Add pci_def.h so romcc compiled files can also get at the
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pci definitions
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-21 16:14:51 +00:00
526855741b
- Cleanups on the romcc side including a pci interface that uses
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fewer registers, and is easier to hardcode.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-19 19:16:21 +00:00
49cf5967ce
descriptor for chips
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-16 23:33:13 +00:00
2c791ce2c1
- Minor bug fixes
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@801 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-26 02:14:06 +00:00
501eb25247
- Almost implement failover booting on the solo.
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I need a very early Hypertransport setup to get anything more going.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-25 03:02:13 +00:00
eb00fa5c11
- Commit a working pirq table for the AMD solo
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@799 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-25 02:02:25 +00:00
825dd3361b
- simple bug fixes
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@798 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-24 23:25:29 +00:00
497eb85441
- irq routing table generated by getpir
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-24 06:57:32 +00:00
8cd55d7f4a
- More attempts to leave irqs in a working state.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-24 06:56:37 +00:00
5899fd82aa
- Small step forward Linux boots and almost works...
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-24 06:25:08 +00:00
8ca8d7665d
- Initial checkin of the freebios2 tree
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 19:02:15 +00:00
Greg Watson