53f486a3ea
fix some really yuck stuff.
...
now things might work.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2414 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-14 16:31:14 +00:00
cba07dd682
additions and mods for lzma.
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Signed-off-by: Carl-Daniel Hailfinger
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2413 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-14 15:12:36 +00:00
7d9441276f
changes for the lx and artecgroup mobo
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Signed-off-by: Indrek Kruusa
Approved-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 21:59:09 +00:00
5c16ebde91
new presents from artec group :-)
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Signed-off-by: Indrek Kruusa
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2411 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 21:25:20 +00:00
b9c100bdb7
add file for dcon support
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signed-off-by: Jordan Crouse
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2410 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 19:30:15 +00:00
e361efd7d7
Add DCON support.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2409 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 19:29:31 +00:00
66c335b8cc
fix cardbus interrups (signed off by Nick Barker)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2408 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 07:55:23 +00:00
613cb6171f
- fix irq routing for epia-mii cardbus slot. (signed off by Nick Barker)
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- some minor cleanups
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2407 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 07:52:41 +00:00
9cf0050d68
Slow down the clock, per Tom Sylla
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2406 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 04:33:07 +00:00
9cf642bad3
fix for qemu northbridge, from Ed Swierk
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Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2405 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 04:12:35 +00:00
aefa3d74f9
warm boot patch from richard smith.
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signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2404 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:57:47 +00:00
5ef4c598fb
Fix the irq_tables
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signed-off-by: ronald g. minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2403 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:14:45 +00:00
cdb89be9e8
mods for qemu, these build
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signed-off-by: ronald g. minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2402 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-13 01:10:08 +00:00
3e03d03a17
hurry hurry before we might start 3.0 ;-)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2400 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-08 16:34:51 +00:00
b59906c1e9
remove dangerous call to normal image; no backup on OLPC
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2399 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-07 15:31:27 +00:00
42fb3164ed
Uwe Hermann:
...
Here's a patch which makes all "option ROM_SIZE" lines use x*y format
which is a lot easier to read and modify, without having to use your
brain or a calculator ;-)
Tested with abuild, no errors.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:42:51 +00:00
ca98f32dd5
Add support for ITE it8705f from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:15:02 +00:00
2073ce2675
Patch from Uwe Hermann:
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* support for it8716f.
* minor fixes for it8712f, it8671f, it8673f
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:12:39 +00:00
61be08bd3e
merge latest code from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-29 17:41:14 +00:00
abaf71a2d5
it8661f support from Uwe Hermann
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2393 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-29 00:45:42 +00:00
bcd1f2310d
- Much better USB P4 fix.
...
This one actualy works. You cannot just go mucking about with stuff that the VSA
has under its thumb. Bad Things happen. This does it the VSA way.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2392 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-28 16:18:32 +00:00
6af77aeb40
Support for two new ITE superio parts: it8712f
...
and it8673f from Uwe Hermann.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2391 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 19:29:57 +00:00
fa60e7f9d0
- USB P4 as host fix
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This should make the USB P4 work as a USB host
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 16:14:31 +00:00
64443b8c49
- fix a silly pointer dereference thinko in my previous commit
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 14:06:48 +00:00
59ba228f92
- Added suport for enabling USB P4 on the olpc
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USB P4 is disabled by default and we need to setup the mux bits proper
to make it work. This is the frame work for that. All thats needed
is the right address values
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-25 05:01:30 +00:00
eca92fb371
Uwe Hermann:
...
here's a patch which replaces all DOS newlines with Unix newlines, and
removes some useless $Rev$, $Id$, and $Header$ tags.
(part 1)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-23 14:28:37 +00:00
6a1540b606
enable graphs created by dot.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-23 11:47:58 +00:00
1ac1cf527d
delete unused device.
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set rom to 512k
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-18 19:25:25 +00:00
8a02b7d54e
add smsc part. Mod sun board to use smsc part for now
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2380 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-17 20:31:09 +00:00
bff323b93b
updates to make gx1 IRQ map work. not tested;
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signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2379 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-16 14:38:00 +00:00
157e1ab47c
share decompression code.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2378 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-16 14:22:10 +00:00
60146861aa
this file is already included by auto.c on all targets.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2377 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-15 13:52:51 +00:00
9d65e6ec02
cleanup patch from Uwe Hermann.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11 23:48:14 +00:00
4c556c5ccb
fix serial initialization (from Uwe Hermann)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2371 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-10 09:38:39 +00:00
af9cd4d0cf
change from AMD for the IRQ10 problem.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-10 03:23:48 +00:00
08af3f535d
mods for the ultra40 bringup. This now builds.
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amd gx2 north -- don't set anything in the north, it conflicts with vsa
settings. So we have our own pci_set_resources that is essentially a
no-op -- just calls the kids.
olpc rev_a config -- DISABLE the compressed rom stream. This SHOULD NOT
have been set -- it is untested and caused real trouble.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2369 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-09 02:21:49 +00:00
e53d03c211
fix up the links for the ultra 40 -- i/o on ht 1 on each cpu
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2368 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-08 21:42:18 +00:00
a758acab7f
fix up config space.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-08 18:02:12 +00:00
90e68aef68
initial work on sunw ultra40. It's wrong :-)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2366 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-07 20:02:02 +00:00
4253844428
add support for ite/it8671f superio from Uwe Hermann.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2365 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-07 16:48:11 +00:00
ac4ca2b17e
p2b uses i82371eb as well.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2364 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 08:58:17 +00:00
a14b46895c
final rename orgy. sorry for the inconvenience. This should fix it again
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2363 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 07:50:59 +00:00
c76b85d6a7
ouch. it's 8_2_371. I'll fix it. This commit breaks compilation
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2362 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 07:47:28 +00:00
d34758f05a
rename southbridge i440bx to its actual name i8371eb
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2361 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-04 07:45:45 +00:00
8e3464109e
Changelog:
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* src/cpu/amd/model_lx/model_lx_init.c
L2 cache initialization removed (moved to northbridge.c)
* src/include/cpu/amd/lxdef.h
more checked values
* src/northbridge/amd/lx/northbridge.c
L2 cache initialization added
cpubug() commented out
* src/northbridge/amd/lx/raminit.c
empty function sdram_set_registers() is in use, don't remove
* src/mainboard/artecgroup/dbe61/Config.lb
irqmap changes
* src/mainboard/artecgroup/dbe61/irq_tables.c
tentative changes to irq table (currently not in use)
* src/mainboard/artecgroup/dbe61/mainboard.c
irq assigned manually to NIC
* src/mainboard/artecgroup/dbe61/Options.lb
gcc 4.0 is OK
* targets/artecgroup/dbe61/Config.lb
64K for VSA is OK at moment
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Andrei Birjukov <andrei.birjukov@artecdesign.ee>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-03 16:48:18 +00:00
8ad7c06535
slightly changed C.D. Hailfinger's precompressed rom stream patch
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2359 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-03 16:19:27 +00:00
085cb4b4ca
Allow setting of serial port speed in EPIA-M config file.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2357 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-02 12:46:13 +00:00
5eca3489b7
Add newer Via Nehemiah stepping levels.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2356 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-02 12:26:47 +00:00
f4c0b596a2
Geode LX: this patch adds configuration/status/self-test MSR definitions
...
for L2 cache and fixes wrong P2D defines.
This also patch adds L2 cache initialization for Geode LX CPU.
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2355 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-02 11:30:32 +00:00
d7088c459c
- Fix some copy bugs and thinkos in the i440bx SMbus
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read code. SBbus reads to RAM now work. Yah!
- Rename the register constants to something I can look at
more easily.
- Make the logic flow match the flow from V1 assembly
- #if 0 out other SMbus functions that are still broken.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2353 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-30 00:23:20 +00:00
01789b630f
- fixup Bitworks/IMS to use private copy of SMbus debug routines
...
Re-enable the SPD dump routine in this Bitworks/IMS code and make
it work like the Asus/p2b. This avoids having to hack the
sdram/generic_dump_spd.c for a single mem controller.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2352 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-29 18:01:43 +00:00
924f92faa2
- Add support _framework_ for the Asus p2b.
...
- New superIO winbond/w83977tf
- Add single memory controller SBbus debug routine
into a file private to the i440bx
This adds support the start of support for an Asus p2b
mainboard. Current limitations are the same as for the
Bitworks IMS board. Reads from the SMbus don't work.
Moving dump_spd_registers() into its own private copy
solves the problem of having to go hack on the version that
included in src/sdram to only do one memory controller.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2351 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-29 17:40:36 +00:00
5e9dc23120
This patch adds support for the AMD LX cpu.
...
There is one global change to pci_ids.h. The rest are changes for LX. I
ran abuild and it is ok. Not all artec design changes are included as
some of them would adversely affect other mainboards. Indrek will need
to test.
Signed-off-by: Ron Minnich
Signed-off-by: Indrek Kruusa, indrek.kruusa@artecdesign.ee , artec
design.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-28 16:06:16 +00:00
59fc4db642
"Hey Ron - Attached is a simple patch that enables the upper banks on the
...
UART. If the upper banks are enabled, then the Linux 8250 driver knows
how to set baud speeds greater then 115200. This was prompted by David
Woodhouse.
Jordan"
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-27 04:05:43 +00:00
cb8eab482f
add framework for i440bx chipset
...
add support for NSC pc87351 SuperIO
add Bitworks/IMS manboard config
This is a very basic framework for the i440bx chipset and the
Bitworks IMS board that uses it. Most things are
structure only.
Known issues:
- SMbus reads to the RAM SPD come back
all zero.
- dump_spd_registers() is commented out since it breaks with
the default setting of generic_dump_spd.c where it wants
2 memory controllers.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-24 04:25:47 +00:00
4788effb04
restore the old code for enabling flash. The new amd code did not work.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2346 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-21 23:21:01 +00:00
da7ee9fa07
These changes incorporate steve goodrich'es fixes, and one bug that is
...
disabled.
cs5536: add new entires for SB control etc.
cs5536.c: chip_enabled function moved to chip_init, so it only gets run
once.
IRQ setup improved
gx2def.h: new defines added
vr.h: new file, with new def's for virtual register control.
mainboard config.lb: new entries added for nb and sb control.
chipsetinit.c: new controls added -- I forget all the details :-)
grphinit.c: new function added
northbridge.c: new IRQ control added. FlashChipSetup added, controlled
by chip info setupflash struct member. Currently, if enabled, this hangs
OLPC in linux PCI scan.
chip.h: new struct members added for unwanted device enable, flash setup
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-21 19:21:38 +00:00
87f194dd9e
this code is for writing the mp table, so only execute it when
...
we actually have one.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2343 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19 16:58:43 +00:00
4f1cb23426
move mptable to 960k to 1M
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https://openbios.org/roundup/linuxbios/issue55
This patch is a little bit enhanced, it keeps the ppc table consistent,
which Yinghai's original patch did not.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19 15:32:49 +00:00
792ebfecd3
closing issue 44: rename ram clocks in cmos.layout
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https://openbios.org/roundup/linuxbios/issue44
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19 14:26:41 +00:00
ef0a24381b
fixing aruma build as suggested by mail ;-)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-18 18:09:36 +00:00
f780d02295
sorry for the inconvenience. this is a test commit.
...
breaking a build is intentional. It will be fixed in a bit.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-18 16:53:19 +00:00
e26d66e9dd
fix handling of mkelfImage'd binaries
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-11 09:04:52 +00:00
707097fc1c
fix interrupt for f5 (ehci)
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-27 02:26:06 +00:00
aad235e906
changes per steve goodrich.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2334 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-27 01:38:17 +00:00
92e8b809b4
fix typo on duplicate line.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-24 14:46:26 +00:00
5560a34c88
fix compilation of s2892.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2330 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-23 20:10:21 +00:00
53a00b7138
match settings per steve goodrich.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2329 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-23 03:39:10 +00:00
88fb1a6c37
set up interrupt values for the southbridge, and add a function to
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manage them. Make pci_level_irq global. Add value settings for OLPC
rev_a board. Comment out no-longer-needed code in olpc mainboard.c
-- it is replaced by the settings in Config.lb, and the support
in cs5536.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2328 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-22 04:37:27 +00:00
9d0b30dd2b
Fixes from AMD. Tested to build on rumba and olpc, and builds.
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Tested to booting linux on olpc, and boots.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-20 03:53:54 +00:00
1f96360315
delete two empty files
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2326 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-18 07:44:45 +00:00
3951027f57
* delete two empty files
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* commit SMM lock code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2325 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-18 07:41:48 +00:00
2d7bb59018
fix idiiot typo I did not catch.
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add support for conditional enable of uarta interrupt.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-18 02:28:07 +00:00
48415d5cf6
add irq mapper support for OLPC and other boards that need this mapping
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done for the gx2 north. tested on OLPC.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2323 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-18 01:29:42 +00:00
6ab0fa9fed
add k8 processor name handling as required by the k8 revision guide.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2322 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-14 23:22:04 +00:00
fd14d4414a
remove erroneous cache disable.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-14 13:56:28 +00:00
73c92a4a7c
ron forget an svn add.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2319 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-12 20:37:33 +00:00
90dc0db6de
Get rid of #if 01 and debug prints that are compiled out.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-12 20:36:51 +00:00
fb93749642
changes from AMD for making OLPC video work.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2316 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-10 22:57:15 +00:00
890ee09a32
further development of OLPC. Set vsm size to 35k. add PCI IRQ for USB.
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Set linuxbios size to 28k. Drop debug level to 8.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-08 14:19:49 +00:00
2d1fe3700e
fix two mainboards that have been broken by someone who does not use abuild.sh
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-26 16:23:00 +00:00
b5fcfdbf89
add DK8HTX support.
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VSAs now required to be nrv2 compressed
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-25 22:08:23 +00:00
d0cffada3c
fix broadcom/blast, tyan/s2735, tyan/s2891, tyan/s2895 broken by r2307
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2311 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-25 12:40:03 +00:00
9dd8d56192
co processor support with s2891
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2310 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18 17:09:14 +00:00
9a8e36da2d
init the ECC for BSP and AP at the same time. So reduce init cpus time
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from 2.1x to 1.1x or from 4x(SERIAL_CPU_INIT) to 1.1x
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2309 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18 17:02:17 +00:00
2b396cdcf2
add option to decide to use onboard vga or addon card.
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CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2308 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18 16:54:30 +00:00
bad9d105cf
cleanup some of the compressed rom stream ugliness -- more to do!
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olpc and rumba can now boot linux out of flash. vsa was resized to 64K.
olpc and rumba now used compressed payload -- thanks stefan!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18 03:07:16 +00:00
5d573c28e7
Commit for IDE NAND FLASH
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2306 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-16 02:51:16 +00:00
98e904ea7c
OLPC now builds and works just fine.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-15 04:44:15 +00:00
b9a335cb9b
correct it, finally.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-12 20:05:08 +00:00
6084160f2d
memory size in cf07
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goodrich pll code
disable havedmi
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-12 18:42:34 +00:00
49a89f19f2
Use a real variable to configure rom base for vsa ...
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2301 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-06 02:54:45 +00:00
694d20e2d6
This is to enable COM1 early.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-05 18:18:33 +00:00
1656c18d76
reorder early startup so that it might work.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2298 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-05 03:54:31 +00:00
070a10f759
mods for early printing on OLPC
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2297 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 23:05:49 +00:00
ab4f5d0c10
fix the tree
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2296 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 10:08:04 +00:00
7ac38a33f6
don't wait core0 started twice
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 01:05:22 +00:00
52377deec0
core range and set_init_ram_access
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2294 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 00:58:14 +00:00
b73fd56488
rm unused file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2293 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 00:48:49 +00:00
608d4b2c44
merge zrom to rom_stream and print olen ilen
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2292 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04 00:47:15 +00:00
4c47532134
oops! Slap me on the head for this one. Quick fix for ward until
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YhLu's suggestions are all there..
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2291 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-03 23:10:00 +00:00
c01fe5d1b6
more changes; rumba enet works fine now.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2290 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-03 03:30:23 +00:00
dc7b71cffa
enable compressed payload per default
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2289 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02 12:07:36 +00:00
ead73689db
add automatic payload compression method to LinuxBIOS
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2288 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02 12:05:13 +00:00
d3ba4aaa24
Fall back to pre-broken settings and setup for GX2.
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We lost a few things, but this is still worth it.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02 03:07:11 +00:00
ae3cbe951b
typo
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2286 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-29 00:12:30 +00:00
64f07fb21c
remove more code
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2285 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 20:44:53 +00:00
c1a4b2b0e5
code cleanup, comments added
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2284 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 18:40:15 +00:00
b947b14734
more code removal and removal of incorrect register settings.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2283 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 17:46:27 +00:00
94571a4767
removing redundant and unneeded calls to functions.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2282 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 17:37:23 +00:00
3716427e7f
we don't need msr_init
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 15:10:55 +00:00
b7a09b4f19
some todo and comment for ron.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2280 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-26 22:07:16 +00:00
417d8c44f9
set irq options.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2278 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 20:05:38 +00:00
cf120d1a89
builds and should do the right things for sb for interrupt routing.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2277 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 19:57:39 +00:00
1c2f49e74a
to give ollie a look.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2276 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 19:40:20 +00:00
5ee2bbb90c
fix the msr.lo for olpc 0x20000019
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2275 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 04:07:44 +00:00
6c20eb4400
hex values with 0x prefix
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-24 16:56:05 +00:00
2a7352cb9d
Adds a CONFIG_MAX_PCI_BUSES to pci_locate_device()
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Default is 255.
This allows mainboard configs for working across various groups
of boards that differ a device that may not loaded.
If you search for a device that is not loaded and max buses is 255
then there can be up to a 8 second delay to search the entire PCI space.
Board configs that know thier max bus can limit this search space.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2273 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-23 23:12:21 +00:00
2f19800268
fix so that olpc uarts come up enabled.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2272 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-23 19:21:12 +00:00
496450c4eb
Lower debug progress messages in vt8623 init to debug level rather than error.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2270 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-21 16:43:06 +00:00
a910a3a022
more 5536 -> 5536 conversion
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2269 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 22:54:32 +00:00
bbdaeaf55c
change to 5536
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:40:20 +00:00
32c315b1ef
change to 5536
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2267 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:38:14 +00:00
b8f4f8891d
remove dup files
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:32:43 +00:00
5d69896c87
add cs5536
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2265 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:31:47 +00:00
05c0869fac
boot to kernel
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:26:01 +00:00
37784b429d
added cs5536
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2263 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:22:40 +00:00
bc5a821f1e
add cs5536 directory
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2262 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:21:25 +00:00
5c97d78b1a
add cs5536 directory
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2261 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20 21:21:13 +00:00
965b5ad85b
resolve conflict
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-19 15:11:01 +00:00
36c00aa39b
fix adjustment for sizeram
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 22:40:53 +00:00
61083dad0f
add back in missing line
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 21:34:32 +00:00
55e10fe3a4
set up timing
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2257 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 21:21:10 +00:00
170ce333ca
add ram resources
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2256 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 20:42:58 +00:00
df46cb205d
added the olpc target and support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2255 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-18 16:36:58 +00:00
ea9db56d0e
add SystemPreInit() and support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-13 19:44:50 +00:00
d8d8fffa0e
minor modification
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-13 17:00:38 +00:00
cf648c9a99
this was in my queue since 2005/10/26
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2252 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-11 19:23:57 +00:00
fbce0ffb92
small fixes to get Ward Vandewege's Tyan board booting.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2251 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-11 18:36:42 +00:00
4b8cf1d30a
added chipsetinit function, many defines. addec call to chipsetinit to
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northbridge.c
builds fine on lippert
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10 23:32:23 +00:00
45f6c5e3d4
add cpureginit to romcc code.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10 16:40:19 +00:00
526b2c429e
clean up gx2def.h a bit.
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Add cpureginit.c
added called to cpureginit to model_gx2_init.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2248 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10 16:14:19 +00:00
5346533656
drop unsupported momentum apache board. Check
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http://snapshots.linuxbios.org/stats/abuild-LinuxBIOSv2-2247.log
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2247 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-08 10:04:43 +00:00
2a9fcb79f4
15->11 for device num
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2246 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-07 20:35:39 +00:00
4223188335
add support for GLIUInit()
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-07 16:55:20 +00:00
40fedaf6a9
add northbridgeinit, also add new constants.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 23:35:52 +00:00
29e2726c4a
pseudo fix xe7501devkit
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 22:50:26 +00:00
f01f154635
fix constants style
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2242 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 21:45:24 +00:00
84e4bf69c7
interesting behavior, i thought svn could do moves.
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the result should be ok though..
the purpose is dropping the old i82801er southbridge code
and using the ich5r code instead because its the same chip
but the code looks more solid and is used by many more systems.
Some of the old i82801er features have been ported (like hpet enable)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2241 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 21:40:36 +00:00
966d0e6d70
break the tree really quick due to svn restrictions, next commit fill fix it
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again.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 21:37:10 +00:00
44f72eb3a3
add bug support for 2.1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2239 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 20:45:10 +00:00
69085400f1
reformat
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 20:23:29 +00:00
5917c62749
more fix for vsm, not working yet
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06 20:19:04 +00:00
8854d30d6e
did I commit the last change?
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try to fix 0x10000026
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 22:20:05 +00:00
81efd7ab6d
comment out reset from MB Config
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2234 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 21:29:48 +00:00
b66f54ac6e
comment out reset in MB Config
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 21:24:05 +00:00
9a791dffea
new cache_as_ram support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 20:38:34 +00:00
ffb7d8a31a
- Adds support for the Advantech eval board. Configuration was produced
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on a SOM-DB2301 baseboard with a SOM-2354 cpu module.
- Also does a slight tweak to the ram test code to make it more
obvious when it fails.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2231 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-01 04:10:44 +00:00
c3efd138a7
trying to translate some of this.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2228 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-26 17:13:31 +00:00
96f8fb5723
make older winbond chips work reliably.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2227 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-23 19:26:40 +00:00
1a971bddcf
fix bit-twiddling errors on msr
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-22 17:30:48 +00:00
96cb656806
added this file
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-22 16:25:49 +00:00
cd6985bce3
vsm can be called now, and then hang.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2224 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-21 23:24:33 +00:00
7f809097f8
add vsm support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-21 15:24:46 +00:00
e4ad801495
cpubug is fine.
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adding vsm support now.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-21 03:38:53 +00:00
316ea53e29
fix conflich
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2221 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 22:20:09 +00:00
af9484a2a8
resolve conflict
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2219 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 21:18:53 +00:00
db44be9405
added definitions. added cpubug support. added object. Commented out
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msr set in northbridge that conflicted with the cpubug support.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 20:49:34 +00:00
1293041db0
some more information on the ts series
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2217 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 19:02:31 +00:00
c4ca49bfec
add a define
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2216 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20 17:31:02 +00:00
e2632fdbb9
redo ts5300 auto.c
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add ts5300 flag as comment in flashrom utility Makefile
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-19 22:30:42 +00:00
3cb4dc9c6b
small cleanup attempt in sc520 code. there needs to be some major spring
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cleaning
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2214 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-19 17:50:54 +00:00
677267a82a
small ts5300 update, fix endian problem in dummmcr.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2213 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-18 00:10:29 +00:00
34407063c2
added initial msr support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17 23:03:04 +00:00
dba3f846f0
- sc520 updates. move PAR setup to mainboard auto.c
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- some ts5300 code. Let's push this upstream for now.
- fix a typo in device.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17 22:48:23 +00:00
042f0430d3
resolving conflict with Ron's work
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17 20:11:38 +00:00
a5ce2341ec
reformating, we are going to use it for
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vsa on geode GX.
There was some bug in setting up stack, what was that?
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2208 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17 19:52:52 +00:00
410075e0f1
fix mmcrval, small cosmetics to raminit
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2207 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17 18:32:10 +00:00
ec5b166f41
add in the msr configuration
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2206 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-16 22:23:03 +00:00
426da0bc45
stupid svn failed.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-15 23:40:30 +00:00
fb7f4cf410
disable watchdog, and it goes much better!
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-15 00:19:03 +00:00
a83b9762fc
for different pll values.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-14 20:17:35 +00:00
a41ff52ba9
Make the pll stuff parameterized.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-14 20:01:51 +00:00
c994c973c6
Fix for nehemiah
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other fixes for gx2 ram init.
support for sharplfg00l04 -- not working yet.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-14 19:58:14 +00:00
d96e098def
go with newer auto.c ...
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but it fails
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-14 00:11:59 +00:00
71e3326b9c
added pll_reset.c
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2195 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-13 22:20:29 +00:00
a413ecc6cd
added early_setup.c
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removed some messages
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-13 22:18:39 +00:00
070a1e02d0
correct __ROMCC__
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-13 22:00:21 +00:00
71eae20b30
failed attempt to do early init for cs5535. Almost there but
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still get garbage reading smbus.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-13 21:58:43 +00:00
ec9cdc980f
I am so stupid to mix up logical and bitwise NOT.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-02 21:33:01 +00:00
416b3d76cd
add smbus access routing for cs5535
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2190 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-02 18:02:24 +00:00
74f36096ae
a few new items and mods for ollie
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2189 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-01 16:11:05 +00:00
c0fe3190c4
remove more unused code
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2188 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-28 23:07:27 +00:00
b2528aa653
remove unused GX1 asm code
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2187 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-28 16:30:41 +00:00
bab9446dfd
semi working with random 1 bit error
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2186 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-28 15:39:25 +00:00
a51e6f1e56
more GX2 commit
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2185 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-27 18:28:30 +00:00
981367932d
rename files
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2184 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-24 17:23:46 +00:00
108dd2c01e
preliminary GX DRAM initization. It is not working yet.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-23 21:39:19 +00:00
394e7c416b
added new superio. added new simple util.
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modified dell 1850
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2178 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-22 22:12:21 +00:00
7db27ee648
gcc 4.1 fixes.
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-19 14:43:48 +00:00
Ronald G. Minnich